0001 * Freescale DMA Controllers
0002
0003 ** Freescale Elo DMA Controller
0004 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
0005 series chips such as mpc8315, mpc8349, mpc8379 etc.
0006
0007 Required properties:
0008
0009 - compatible : must include "fsl,elo-dma"
0010 - reg : DMA General Status Register, i.e. DGSR which contains
0011 status for all the 4 DMA channels
0012 - ranges : describes the mapping between the address space of the
0013 DMA channels and the address space of the DMA controller
0014 - cell-index : controller index. 0 for controller @ 0x8100
0015 - interrupts : interrupt specifier for DMA IRQ
0016
0017 - DMA channel nodes:
0018 - compatible : must include "fsl,elo-dma-channel"
0019 However, see note below.
0020 - reg : DMA channel specific registers
0021 - cell-index : DMA channel index starts at 0.
0022
0023 Optional properties:
0024 - interrupts : interrupt specifier for DMA channel IRQ
0025 (on 83xx this is expected to be identical to
0026 the interrupts property of the parent node)
0027
0028 Example:
0029 dma@82a8 {
0030 #address-cells = <1>;
0031 #size-cells = <1>;
0032 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
0033 reg = <0x82a8 4>;
0034 ranges = <0 0x8100 0x1a4>;
0035 interrupt-parent = <&ipic>;
0036 interrupts = <71 8>;
0037 cell-index = <0>;
0038 dma-channel@0 {
0039 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
0040 cell-index = <0>;
0041 reg = <0 0x80>;
0042 interrupt-parent = <&ipic>;
0043 interrupts = <71 8>;
0044 };
0045 dma-channel@80 {
0046 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
0047 cell-index = <1>;
0048 reg = <0x80 0x80>;
0049 interrupt-parent = <&ipic>;
0050 interrupts = <71 8>;
0051 };
0052 dma-channel@100 {
0053 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
0054 cell-index = <2>;
0055 reg = <0x100 0x80>;
0056 interrupt-parent = <&ipic>;
0057 interrupts = <71 8>;
0058 };
0059 dma-channel@180 {
0060 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
0061 cell-index = <3>;
0062 reg = <0x180 0x80>;
0063 interrupt-parent = <&ipic>;
0064 interrupts = <71 8>;
0065 };
0066 };
0067
0068 ** Freescale EloPlus DMA Controller
0069 This is a 4-channel DMA controller with extended addresses and chaining,
0070 mainly used in Freescale mpc85xx/86xx, Pxxx and BSC series chips, such as
0071 mpc8540, mpc8641 p4080, bsc9131 etc.
0072
0073 Required properties:
0074
0075 - compatible : must include "fsl,eloplus-dma"
0076 - reg : DMA General Status Register, i.e. DGSR which contains
0077 status for all the 4 DMA channels
0078 - cell-index : controller index. 0 for controller @ 0x21000,
0079 1 for controller @ 0xc000
0080 - ranges : describes the mapping between the address space of the
0081 DMA channels and the address space of the DMA controller
0082
0083 - DMA channel nodes:
0084 - compatible : must include "fsl,eloplus-dma-channel"
0085 However, see note below.
0086 - cell-index : DMA channel index starts at 0.
0087 - reg : DMA channel specific registers
0088 - interrupts : interrupt specifier for DMA channel IRQ
0089
0090 Example:
0091 dma@21300 {
0092 #address-cells = <1>;
0093 #size-cells = <1>;
0094 compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
0095 reg = <0x21300 4>;
0096 ranges = <0 0x21100 0x200>;
0097 cell-index = <0>;
0098 dma-channel@0 {
0099 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
0100 reg = <0 0x80>;
0101 cell-index = <0>;
0102 interrupt-parent = <&mpic>;
0103 interrupts = <20 2>;
0104 };
0105 dma-channel@80 {
0106 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
0107 reg = <0x80 0x80>;
0108 cell-index = <1>;
0109 interrupt-parent = <&mpic>;
0110 interrupts = <21 2>;
0111 };
0112 dma-channel@100 {
0113 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
0114 reg = <0x100 0x80>;
0115 cell-index = <2>;
0116 interrupt-parent = <&mpic>;
0117 interrupts = <22 2>;
0118 };
0119 dma-channel@180 {
0120 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
0121 reg = <0x180 0x80>;
0122 cell-index = <3>;
0123 interrupt-parent = <&mpic>;
0124 interrupts = <23 2>;
0125 };
0126 };
0127
0128 ** Freescale Elo3 DMA Controller
0129 DMA controller which has same function as EloPlus except that Elo3 has 8
0130 channels while EloPlus has only 4, it is used in Freescale Txxx and Bxxx
0131 series chips, such as t1040, t4240, b4860.
0132
0133 Required properties:
0134
0135 - compatible : must include "fsl,elo3-dma"
0136 - reg : contains two entries for DMA General Status Registers,
0137 i.e. DGSR0 which includes status for channel 1~4, and
0138 DGSR1 for channel 5~8
0139 - ranges : describes the mapping between the address space of the
0140 DMA channels and the address space of the DMA controller
0141
0142 - DMA channel nodes:
0143 - compatible : must include "fsl,eloplus-dma-channel"
0144 - reg : DMA channel specific registers
0145 - interrupts : interrupt specifier for DMA channel IRQ
0146
0147 Example:
0148 dma@100300 {
0149 #address-cells = <1>;
0150 #size-cells = <1>;
0151 compatible = "fsl,elo3-dma";
0152 reg = <0x100300 0x4>,
0153 <0x100600 0x4>;
0154 ranges = <0x0 0x100100 0x500>;
0155 dma-channel@0 {
0156 compatible = "fsl,eloplus-dma-channel";
0157 reg = <0x0 0x80>;
0158 interrupts = <28 2 0 0>;
0159 };
0160 dma-channel@80 {
0161 compatible = "fsl,eloplus-dma-channel";
0162 reg = <0x80 0x80>;
0163 interrupts = <29 2 0 0>;
0164 };
0165 dma-channel@100 {
0166 compatible = "fsl,eloplus-dma-channel";
0167 reg = <0x100 0x80>;
0168 interrupts = <30 2 0 0>;
0169 };
0170 dma-channel@180 {
0171 compatible = "fsl,eloplus-dma-channel";
0172 reg = <0x180 0x80>;
0173 interrupts = <31 2 0 0>;
0174 };
0175 dma-channel@300 {
0176 compatible = "fsl,eloplus-dma-channel";
0177 reg = <0x300 0x80>;
0178 interrupts = <76 2 0 0>;
0179 };
0180 dma-channel@380 {
0181 compatible = "fsl,eloplus-dma-channel";
0182 reg = <0x380 0x80>;
0183 interrupts = <77 2 0 0>;
0184 };
0185 dma-channel@400 {
0186 compatible = "fsl,eloplus-dma-channel";
0187 reg = <0x400 0x80>;
0188 interrupts = <78 2 0 0>;
0189 };
0190 dma-channel@480 {
0191 compatible = "fsl,eloplus-dma-channel";
0192 reg = <0x480 0x80>;
0193 interrupts = <79 2 0 0>;
0194 };
0195 };
0196
0197 Note on DMA channel compatible properties: The compatible property must say
0198 "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
0199 driver (fsldma). Any DMA channel used by fsldma cannot be used by another
0200 DMA driver, such as the SSI sound drivers for the MPC8610. Therefore, any DMA
0201 channel that should be used for another driver should not use
0202 "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel". For the SSI drivers, for
0203 example, the compatible property should be "fsl,ssi-dma-channel". See ssi.txt
0204 for more information.
