0001 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/phy/samsung,exynos5250-sata-phy.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Samsung Exynos5250 SoC SATA PHY
0008
0009 maintainers:
0010 - Krzysztof Kozlowski <krzk@kernel.org>
0011 - Marek Szyprowski <m.szyprowski@samsung.com>
0012 - Sylwester Nawrocki <s.nawrocki@samsung.com>
0013
0014 properties:
0015 compatible:
0016 const: samsung,exynos5250-sata-phy
0017
0018 clocks:
0019 maxItems: 1
0020
0021 clock-names:
0022 items:
0023 - const: sata_phyctrl
0024
0025 "#phy-cells":
0026 const: 0
0027
0028 reg:
0029 maxItems: 1
0030
0031 samsung,syscon-phandle:
0032 $ref: /schemas/types.yaml#/definitions/phandle
0033 description:
0034 Phandle to PMU system controller interface.
0035
0036 samsung,exynos-sataphy-i2c-phandle:
0037 $ref: /schemas/types.yaml#/definitions/phandle
0038 description:
0039 Phandle to I2C SATA interface.
0040
0041 required:
0042 - compatible
0043 - clocks
0044 - clock-names
0045 - "#phy-cells"
0046 - reg
0047 - samsung,syscon-phandle
0048 - samsung,exynos-sataphy-i2c-phandle
0049
0050 additionalProperties: false
0051
0052 examples:
0053 - |
0054 #include <dt-bindings/clock/exynos5250.h>
0055
0056 phy@12170000 {
0057 compatible = "samsung,exynos5250-sata-phy";
0058 reg = <0x12170000 0x1ff>;
0059 clocks = <&clock CLK_SATA_PHYCTRL>;
0060 clock-names = "sata_phyctrl";
0061 #phy-cells = <0>;
0062 samsung,syscon-phandle = <&pmu_system_controller>;
0063 samsung,exynos-sataphy-i2c-phandle = <&sata_phy_i2c>;
0064 };
