0001 Rockchip EMMC PHY
0002 -----------------------
0003
0004 Required properties:
0005 - compatible: rockchip,rk3399-emmc-phy
0006 - #phy-cells: must be 0
0007 - reg: PHY register address offset and length in "general
0008 register files"
0009
0010 Optional properties:
0011 - clock-names: Should contain "emmcclk". Although this is listed as optional
0012 (because most boards can get basic functionality without having
0013 access to it), it is strongly suggested.
0014 See ../clock/clock-bindings.txt for details.
0015 - clocks: Should have a phandle to the card clock exported by the SDHCI driver.
0016 - drive-impedance-ohm: Specifies the drive impedance in Ohm.
0017 Possible values are 33, 40, 50, 66 and 100.
0018 If not set, the default value of 50 will be applied.
0019 - rockchip,enable-strobe-pulldown: Enable internal pull-down for the strobe
0020 line. If not set, pull-down is not used.
0021 - rockchip,output-tapdelay-select: Specifies the phyctrl_otapdlysec register.
0022 If not set, the register defaults to 0x4.
0023 Maximum value 0xf.
0024
0025 Example:
0026
0027
0028 grf: syscon@ff770000 {
0029 compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
0030 #address-cells = <1>;
0031 #size-cells = <1>;
0032
0033 ...
0034
0035 emmcphy: phy@f780 {
0036 compatible = "rockchip,rk3399-emmc-phy";
0037 reg = <0xf780 0x20>;
0038 clocks = <&sdhci>;
0039 clock-names = "emmcclk";
0040 drive-impedance-ohm = <50>;
0041 #phy-cells = <0>;
0042 };
0043 };
