bindings/phy/renesas%2Cusb2-phy.yaml

0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/phy/renesas,usb2-phy.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Renesas R-Car generation 3 USB 2.0 PHY
0008
0009 maintainers:
0010   - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
0011
0012 properties:
0013   compatible:
0014     oneOf:
0015       - items:
0016           - const: renesas,usb2-phy-r8a77470 # RZ/G1C
0017
0018       - items:
0019           - enum:
0020               - renesas,usb2-phy-r7s9210  # RZ/A2
0021               - renesas,usb2-phy-r8a774a1 # RZ/G2M
0022               - renesas,usb2-phy-r8a774b1 # RZ/G2N
0023               - renesas,usb2-phy-r8a774c0 # RZ/G2E
0024               - renesas,usb2-phy-r8a774e1 # RZ/G2H
0025               - renesas,usb2-phy-r8a7795  # R-Car H3
0026               - renesas,usb2-phy-r8a7796  # R-Car M3-W
0027               - renesas,usb2-phy-r8a77961 # R-Car M3-W+
0028               - renesas,usb2-phy-r8a77965 # R-Car M3-N
0029               - renesas,usb2-phy-r8a77990 # R-Car E3
0030               - renesas,usb2-phy-r8a77995 # R-Car D3
0031           - const: renesas,rcar-gen3-usb2-phy
0032
0033       - items:
0034           - enum:
0035               - renesas,usb2-phy-r9a07g043 # RZ/G2UL
0036               - renesas,usb2-phy-r9a07g044 # RZ/G2{L,LC}
0037               - renesas,usb2-phy-r9a07g054 # RZ/V2L
0038           - const: renesas,rzg2l-usb2-phy
0039
0040   reg:
0041     maxItems: 1
0042
0043   clocks:
0044     minItems: 1
0045     maxItems: 2
0046
0047   clock-names:
0048     minItems: 1
0049     items:
0050       - const: fck
0051       - const: usb_x1
0052
0053   '#phy-cells':
0054     enum: [0, 1]  # and 0 is deprecated.
0055     description: |
0056       The phandle's argument in the PHY specifier is the INT_STATUS bit of
0057       controller.
0058       - 1 = USBH_INTA (OHCI)
0059       - 2 = USBH_INTB (EHCI)
0060       - 3 = UCOM_INT (OTG and BC)
0061
0062   interrupts:
0063     maxItems: 1
0064
0065   power-domains:
0066     maxItems: 1
0067
0068   resets:
0069     minItems: 1
0070     items:
0071       - description: reset of USB 2.0 host side
0072       - description: reset of USB 2.0 peripheral side
0073
0074   vbus-supply:
0075     description: |
0076       Phandle to a regulator that provides power to the VBUS. This regulator
0077       will be managed during the PHY power on/off sequence.
0078
0079   renesas,no-otg-pins:
0080     $ref: /schemas/types.yaml#/definitions/flag
0081     description: |
0082       specify when a board does not provide proper otg pins.
0083
0084   dr_mode: true
0085
0086 if:
0087   properties:
0088     compatible:
0089       contains:
0090         const: renesas,usb2-phy-r7s9210
0091 then:
0092   required:
0093     - clock-names
0094
0095 required:
0096   - compatible
0097   - reg
0098   - clocks
0099   - '#phy-cells'
0100
0101 allOf:
0102   - if:
0103       properties:
0104         compatible:
0105           contains:
0106             const: renesas,rzg2l-usb2-phy
0107     then:
0108       required:
0109         - resets
0110
0111 additionalProperties: false
0112
0113 examples:
0114   - |
0115     #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
0116     #include <dt-bindings/interrupt-controller/arm-gic.h>
0117     #include <dt-bindings/power/r8a7795-sysc.h>
0118
0119     usb-phy@ee080200 {
0120         compatible = "renesas,usb2-phy-r8a7795", "renesas,rcar-gen3-usb2-phy";
0121         reg = <0xee080200 0x700>;
0122         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
0123         clocks = <&cpg CPG_MOD 703>;
0124         #phy-cells = <1>;
0125     };
0126
0127     usb-phy@ee0a0200 {
0128         compatible = "renesas,usb2-phy-r8a7795", "renesas,rcar-gen3-usb2-phy";
0129         reg = <0xee0a0200 0x700>;
0130         clocks = <&cpg CPG_MOD 702>;
0131         #phy-cells = <1>;
0132     };