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0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: "http://devicetree.org/schemas/phy/qcom,usb-hs-28nm.yaml#"
0005 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
0006 
0007 title: Qualcomm Synopsys DesignWare Core 28nm High-Speed PHY
0008 
0009 maintainers:
0010   - Bryan O'Donoghue <bryan.odonoghue@linaro.org>
0011 
0012 description: |
0013   Qualcomm Low-Speed, Full-Speed, Hi-Speed 28nm USB PHY
0014 
0015 properties:
0016   compatible:
0017     enum:
0018       - qcom,usb-hs-28nm-femtophy
0019       - qcom,usb-hs-28nm-mdm9607
0020 
0021   reg:
0022     maxItems: 1
0023 
0024   "#phy-cells":
0025     const: 0
0026 
0027   clocks:
0028     items:
0029       - description: rpmcc ref clock
0030       - description: PHY AHB clock
0031       - description: Rentention clock
0032 
0033   clock-names:
0034     items:
0035       - const: ref
0036       - const: ahb
0037       - const: sleep
0038 
0039   resets:
0040     items:
0041       - description: PHY core reset
0042       - description: POR reset
0043 
0044   reset-names:
0045     items:
0046       - const: phy
0047       - const: por
0048 
0049   vdd-supply:
0050     description: phandle to the regulator VDD supply node.
0051 
0052   vdda1p8-supply:
0053     description: phandle to the regulator 1.8V supply node.
0054 
0055   vdda3p3-supply:
0056     description: phandle to the regulator 3.3V supply node.
0057 
0058 required:
0059   - compatible
0060   - reg
0061   - "#phy-cells"
0062   - clocks
0063   - clock-names
0064   - resets
0065   - reset-names
0066   - vdd-supply
0067   - vdda1p8-supply
0068   - vdda3p3-supply
0069 
0070 additionalProperties: false
0071 
0072 examples:
0073   - |
0074     #include <dt-bindings/clock/qcom,gcc-qcs404.h>
0075     #include <dt-bindings/clock/qcom,rpmcc.h>
0076     usb2_phy_prim: phy@7a000 {
0077         compatible = "qcom,usb-hs-28nm-femtophy";
0078         reg = <0x0007a000 0x200>;
0079         #phy-cells = <0>;
0080         clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
0081                  <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
0082                  <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
0083         clock-names = "ref", "ahb", "sleep";
0084         resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>,
0085                  <&gcc GCC_USB2A_PHY_BCR>;
0086         reset-names = "phy", "por";
0087         vdd-supply = <&vreg_l4_1p2>;
0088         vdda1p8-supply = <&vreg_l5_1p8>;
0089         vdda3p3-supply = <&vreg_l12_3p3>;
0090     };
0091 ...