0001 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/phy/qcom,ipq806x-usb-phy-ss.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Qualcomm ipq806x usb DWC3 SS PHY CONTROLLER
0008
0009 maintainers:
0010 - Ansuel Smith <ansuelsmth@gmail.com>
0011
0012 description:
0013 DWC3 PHY nodes are defined to describe on-chip Synopsis Physical layer
0014 controllers used in ipq806x. Each DWC3 PHY controller should have its
0015 own node.
0016
0017 properties:
0018 compatible:
0019 const: qcom,ipq806x-usb-phy-ss
0020
0021 "#phy-cells":
0022 const: 0
0023
0024 reg:
0025 maxItems: 1
0026
0027 clocks:
0028 minItems: 1
0029 maxItems: 2
0030
0031 clock-names:
0032 minItems: 1
0033 items:
0034 - const: ref
0035 - const: xo
0036
0037 qcom,rx-eq:
0038 $ref: /schemas/types.yaml#/definitions/uint32
0039 description: Override value for rx_eq.
0040 default: 4
0041 maximum: 7
0042
0043 qcom,tx-deamp-3_5db:
0044 $ref: /schemas/types.yaml#/definitions/uint32
0045 description: Override value for transmit preemphasis.
0046 default: 23
0047 maximum: 63
0048
0049 qcom,mpll:
0050 $ref: /schemas/types.yaml#/definitions/uint32
0051 description: Override value for mpll.
0052 default: 0
0053 maximum: 7
0054
0055 required:
0056 - compatible
0057 - "#phy-cells"
0058 - reg
0059 - clocks
0060 - clock-names
0061
0062 additionalProperties: false
0063
0064 examples:
0065 - |
0066 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
0067
0068 ss_phy_0: phy@110f8830 {
0069 compatible = "qcom,ipq806x-usb-phy-ss";
0070 reg = <0x110f8830 0x30>;
0071 clocks = <&gcc USB30_0_MASTER_CLK>;
0072 clock-names = "ref";
0073 #phy-cells = <0>;
0074 };
