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0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 
0005 $id: http://devicetree.org/schemas/phy/qcom,hdmi-phy-qmp.yaml#
0006 $schema: http://devicetree.org/meta-schemas/core.yaml#
0007 
0008 title: Qualcomm Adreno/Snapdragon QMP HDMI phy
0009 
0010 maintainers:
0011   - Rob Clark <robdclark@gmail.com>
0012 
0013 properties:
0014   compatible:
0015     enum:
0016       - qcom,hdmi-phy-8996
0017 
0018   reg:
0019     maxItems: 6
0020 
0021   reg-names:
0022     items:
0023       - const: hdmi_pll
0024       - const: hdmi_tx_l0
0025       - const: hdmi_tx_l1
0026       - const: hdmi_tx_l2
0027       - const: hdmi_tx_l3
0028       - const: hdmi_phy
0029 
0030   clocks:
0031     maxItems: 2
0032 
0033   clock-names:
0034     items:
0035       - const: iface
0036       - const: ref
0037 
0038   power-domains:
0039     maxItems: 1
0040 
0041   vcca-supply:
0042     description: phandle to VCCA supply regulator
0043 
0044   vddio-supply:
0045     description: phandle to VDD I/O supply regulator
0046 
0047   '#phy-cells':
0048     const: 0
0049 
0050 required:
0051   - compatible
0052   - clocks
0053   - clock-names
0054   - reg
0055   - reg-names
0056   - '#phy-cells'
0057 
0058 additionalProperties: false
0059 
0060 examples:
0061   - |
0062     hdmi-phy@9a0600 {
0063       compatible = "qcom,hdmi-phy-8996";
0064       reg = <0x009a0600 0x1c4>,
0065             <0x009a0a00 0x124>,
0066             <0x009a0c00 0x124>,
0067             <0x009a0e00 0x124>,
0068             <0x009a1000 0x124>,
0069             <0x009a1200 0x0c8>;
0070       reg-names = "hdmi_pll",
0071                   "hdmi_tx_l0",
0072                   "hdmi_tx_l1",
0073                   "hdmi_tx_l2",
0074                   "hdmi_tx_l3",
0075                   "hdmi_phy";
0076 
0077       clocks = <&mmcc 116>,
0078                <&gcc 214>;
0079       clock-names = "iface",
0080                     "ref";
0081       #phy-cells = <0>;
0082 
0083       vddio-supply = <&vreg_l12a_1p8>;
0084       vcca-supply = <&vreg_l28a_0p925>;
0085     };