0001 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/phy/phy-stm32-usbphyc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: STMicroelectronics STM32 USB HS PHY controller binding
0008
0009 description:
0010
0011 The STM32 USBPHYC block contains a dual port High Speed UTMI+ PHY and a UTMI
0012 switch. It controls PHY configuration and status, and the UTMI+ switch that
0013 selects either OTG or HOST controller for the second PHY port. It also sets
0014 PLL configuration.
0015
0016 USBPHYC
0017 |_ PLL
0018 |
0019 |_ PHY port#1 _________________ HOST controller
0020 | __ |
0021 | / 1|________________|
0022 |_ PHY port#2 ----| |________________
0023 | \_0| |
0024 |_ UTMI switch_______| OTG controller
0025
0026 maintainers:
0027 - Amelie Delaunay <amelie.delaunay@foss.st.com>
0028
0029 properties:
0030 compatible:
0031 const: st,stm32mp1-usbphyc
0032
0033 reg:
0034 maxItems: 1
0035
0036 clocks:
0037 maxItems: 1
0038
0039 resets:
0040 maxItems: 1
0041
0042 "#address-cells":
0043 const: 1
0044
0045 "#size-cells":
0046 const: 0
0047
0048 vdda1v1-supply:
0049 description: regulator providing 1V1 power supply to the PLL block
0050
0051 vdda1v8-supply:
0052 description: regulator providing 1V8 power supply to the PLL block
0053
0054 '#clock-cells':
0055 description: number of clock cells for ck_usbo_48m consumer
0056 const: 0
0057
0058 #Required child nodes:
0059
0060 patternProperties:
0061 "^usb-phy@[0|1]$":
0062 type: object
0063 description:
0064 Each port the controller provides must be represented as a sub-node.
0065
0066 properties:
0067 reg:
0068 description: phy port index.
0069 maxItems: 1
0070
0071 phy-supply:
0072 description: regulator providing 3V3 power supply to the PHY.
0073
0074 "#phy-cells":
0075 enum: [ 0x0, 0x1 ]
0076
0077 connector:
0078 type: object
0079 $ref: /schemas/connector/usb-connector.yaml
0080 properties:
0081 vbus-supply: true
0082
0083 # It can be necessary to adjust the PHY settings to compensate parasitics, which can be due
0084 # to USB connector/receptacle, routing, ESD protection component,... Here is the list of
0085 # all optional parameters to tune the interface of the PHY (HS for High-Speed, FS for Full-
0086 # Speed, LS for Low-Speed)
0087
0088 st,current-boost-microamp:
0089 description: Current boosting in uA
0090 enum: [ 1000, 2000 ]
0091
0092 st,no-lsfs-fb-cap:
0093 description: Disables the LS/FS feedback capacitor
0094 type: boolean
0095
0096 st,decrease-hs-slew-rate:
0097 description: Decreases the HS driver slew rate by 10%
0098 type: boolean
0099
0100 st,tune-hs-dc-level:
0101 description: |
0102 Tunes the HS driver DC level
0103 - <0> normal level
0104 - <1> increases the level by 5 to 7 mV
0105 - <2> increases the level by 10 to 14 mV
0106 - <3> decreases the level by 5 to 7 mV
0107 $ref: /schemas/types.yaml#/definitions/uint32
0108 minimum: 0
0109 maximum: 3
0110 default: 0
0111
0112 st,enable-fs-rftime-tuning:
0113 description: Enables the FS rise/fall tuning option
0114 type: boolean
0115
0116 st,enable-hs-rftime-reduction:
0117 description: Enables the HS rise/fall reduction feature
0118 type: boolean
0119
0120 st,trim-hs-current:
0121 description: |
0122 Controls HS driver current trimming for choke compensation
0123 - <0> = 18.87 mA target current / nominal + 0%
0124 - <1> = 19.165 mA target current / nominal + 1.56%
0125 - <2> = 19.46 mA target current / nominal + 3.12%
0126 - <3> = 19.755 mA target current / nominal + 4.68%
0127 - <4> = 20.05 mA target current / nominal + 6.24%
0128 - <5> = 20.345 mA target current / nominal + 7.8%
0129 - <6> = 20.64 mA target current / nominal + 9.36%
0130 - <7> = 20.935 mA target current / nominal + 10.92%
0131 - <8> = 21.23 mA target current / nominal + 12.48%
0132 - <9> = 21.525 mA target current / nominal + 14.04%
0133 - <10> = 21.82 mA target current / nominal + 15.6%
0134 - <11> = 22.115 mA target current / nominal + 17.16%
0135 - <12> = 22.458 mA target current / nominal + 19.01%
0136 - <13> = 22.755 mA target current / nominal + 20.58%
0137 - <14> = 23.052 mA target current / nominal + 22.16%
0138 - <15> = 23.348 mA target current / nominal + 23.73%
0139 $ref: /schemas/types.yaml#/definitions/uint32
0140 minimum: 0
0141 maximum: 15
0142 default: 0
0143
0144 st,trim-hs-impedance:
0145 description: |
0146 Controls HS driver impedance tuning for choke compensation
0147 - <0> = no impedance offset
0148 - <1> = reduce the impedance by 2 ohms
0149 - <2> = reduce the impedance by 4 ohms
0150 - <3> = reduce the impedance by 6 ohms
0151 $ref: /schemas/types.yaml#/definitions/uint32
0152 minimum: 0
0153 maximum: 3
0154 default: 0
0155
0156 st,tune-squelch-level:
0157 description: |
0158 Tunes the squelch DC threshold value
0159 - <0> = no shift in threshold
0160 - <1> = threshold shift by +7 mV
0161 - <2> = threshold shift by -5 mV
0162 - <3> = threshold shift by +14 mV
0163 $ref: /schemas/types.yaml#/definitions/uint32
0164 minimum: 0
0165 maximum: 3
0166 default: 0
0167
0168 st,enable-hs-rx-gain-eq:
0169 description: Enables the HS Rx gain equalizer
0170 type: boolean
0171
0172 st,tune-hs-rx-offset:
0173 description: |
0174 Adjusts the HS Rx offset
0175 - <0> = no offset
0176 - <1> = offset of +5 mV
0177 - <2> = offset of +10 mV
0178 - <3> = offset of -5 mV
0179 $ref: /schemas/types.yaml#/definitions/uint32
0180 minimum: 0
0181 maximum: 3
0182 default: 0
0183
0184 st,no-hs-ftime-ctrl:
0185 description: Disables the HS fall time control of single ended signals during pre-emphasis
0186 type: boolean
0187
0188 st,no-lsfs-sc:
0189 description: Disables the short circuit protection in LS/FS driver
0190 type: boolean
0191
0192 st,enable-hs-tx-staggering:
0193 description: Enables the basic staggering in HS Tx mode
0194 type: boolean
0195
0196 allOf:
0197 - if:
0198 properties:
0199 reg:
0200 const: 0
0201 then:
0202 properties:
0203 "#phy-cells":
0204 const: 0
0205 else:
0206 properties:
0207 "#phy-cells":
0208 const: 1
0209 description:
0210 The value is used to select UTMI switch output.
0211 0 for OTG controller and 1 for Host controller.
0212
0213 required:
0214 - reg
0215 - phy-supply
0216 - "#phy-cells"
0217
0218 additionalProperties: false
0219
0220 required:
0221 - compatible
0222 - reg
0223 - clocks
0224 - "#address-cells"
0225 - "#size-cells"
0226 - vdda1v1-supply
0227 - vdda1v8-supply
0228 - usb-phy@0
0229 - usb-phy@1
0230
0231 additionalProperties: false
0232
0233 examples:
0234 - |
0235 #include <dt-bindings/clock/stm32mp1-clks.h>
0236 #include <dt-bindings/reset/stm32mp1-resets.h>
0237 usbphyc: usbphyc@5a006000 {
0238 compatible = "st,stm32mp1-usbphyc";
0239 reg = <0x5a006000 0x1000>;
0240 clocks = <&rcc USBPHY_K>;
0241 resets = <&rcc USBPHY_R>;
0242 vdda1v1-supply = <®11>;
0243 vdda1v8-supply = <®18>;
0244 #address-cells = <1>;
0245 #size-cells = <0>;
0246 #clock-cells = <0>;
0247
0248 usbphyc_port0: usb-phy@0 {
0249 reg = <0>;
0250 phy-supply = <&vdd_usb>;
0251 #phy-cells = <0>;
0252 st,tune-hs-dc-level = <2>;
0253 st,enable-fs-rftime-tuning;
0254 st,enable-hs-rftime-reduction;
0255 st,trim-hs-current = <15>;
0256 st,trim-hs-impedance = <1>;
0257 st,tune-squelch-level = <3>;
0258 st,tune-hs-rx-offset = <2>;
0259 st,no-lsfs-sc;
0260 connector {
0261 compatible = "usb-a-connector";
0262 vbus-supply = <&vbus_sw>;
0263 };
0264 };
0265
0266 usbphyc_port1: usb-phy@1 {
0267 reg = <1>;
0268 phy-supply = <&vdd_usb>;
0269 #phy-cells = <1>;
0270 st,tune-hs-dc-level = <2>;
0271 st,enable-fs-rftime-tuning;
0272 st,enable-hs-rftime-reduction;
0273 st,trim-hs-current = <15>;
0274 st,trim-hs-impedance = <1>;
0275 st,tune-squelch-level = <3>;
0276 st,tune-hs-rx-offset = <2>;
0277 st,no-lsfs-sc;
0278 };
0279 };
0280 ...
