0001 Device tree binding for NVIDIA Tegra XUSB pad controller
0002 ========================================================
0003
0004 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
0005 signals) which connect directly to pins/pads on the SoC package. Each lane
0006 is controlled by a HW block referred to as a "pad" in the Tegra hardware
0007 documentation. Each such "pad" may control either one or multiple lanes,
0008 and thus contains any logic common to all its lanes. Each lane can be
0009 separately configured and powered up.
0010
0011 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
0012 super-speed USB. Other lanes are for various types of low-speed, full-speed
0013 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
0014 contains a software-configurable mux that sits between the I/O controller
0015 ports (e.g. PCIe) and the lanes.
0016
0017 In addition to per-lane configuration, USB 3.0 ports may require additional
0018 settings on a per-board basis.
0019
0020 Pads will be represented as children of the top-level XUSB pad controller
0021 device tree node. Each lane exposed by the pad will be represented by its
0022 own subnode and can be referenced by users of the lane using the standard
0023 PHY bindings, as described by the phy-bindings.txt file in this directory.
0024
0025 The Tegra hardware documentation refers to the connection between the XUSB
0026 pad controller and the XUSB controller as "ports". This is confusing since
0027 "port" is typically used to denote the physical USB receptacle. The device
0028 tree binding in this document uses the term "port" to refer to the logical
0029 abstraction of the signals that are routed to a USB receptacle (i.e. a PHY
0030 for the USB signal, the VBUS power supply, the USB 2.0 companion port for
0031 USB 3.0 receptacles, ...).
0032
0033 Required properties:
0034 --------------------
0035 - compatible: Must be:
0036 - Tegra124: "nvidia,tegra124-xusb-padctl"
0037 - Tegra132: "nvidia,tegra132-xusb-padctl", "nvidia,tegra124-xusb-padctl"
0038 - Tegra210: "nvidia,tegra210-xusb-padctl"
0039 - Tegra186: "nvidia,tegra186-xusb-padctl"
0040 - Tegra194: "nvidia,tegra194-xusb-padctl"
0041 - reg: Physical base address and length of the controller's registers.
0042 - resets: Must contain an entry for each entry in reset-names.
0043 - reset-names: Must include the following entries:
0044 - "padctl"
0045
0046 For Tegra124:
0047 - avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.
0048 - avdd-pll-erefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.
0049 - avdd-pex-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.
0050 - hvdd-pex-pll-e-supply: High-voltage PLLE power supply. Must supply 3.3 V.
0051
0052 For Tegra210:
0053 - avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.
0054 - avdd-pll-uerefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.
0055 - dvdd-pex-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.
0056 - hvdd-pex-pll-e-supply: High-voltage PLLE power supply. Must supply 1.8 V.
0057 - nvidia,pmc: phandle and specifier referring to the Tegra210 PMC node.
0058
0059 For Tegra186:
0060 - avdd-pll-erefeut-supply: UPHY brick and reference clock as well as UTMI PHY
0061 power supply. Must supply 1.8 V.
0062 - avdd-usb-supply: USB I/Os, VBUS, ID, REXT, D+/D- power supply. Must supply
0063 3.3 V.
0064 - vclamp-usb-supply: Bias rail for USB pad. Must supply 1.8 V.
0065 - vddio-hsic-supply: HSIC PHY power supply. Must supply 1.2 V.
0066
0067 For Tegra194:
0068 - avdd-usb-supply: USB I/Os, VBUS, ID, REXT, D+/D- power supply. Must supply
0069 3.3 V.
0070 - vclamp-usb-supply: Bias rail for USB pad. Must supply 1.8 V.
0071
0072 Pad nodes:
0073 ==========
0074
0075 A required child node named "pads" contains a list of subnodes, one for each
0076 of the pads exposed by the XUSB pad controller. Each pad may need additional
0077 resources that can be referenced in its pad node.
0078
0079 The "status" property is used to enable or disable the use of a pad. If set
0080 to "disabled", the pad will not be used on the given board. In order to use
0081 the pad and any of its lanes, this property must be set to "okay".
0082
0083 For Tegra124 and Tegra132, the following pads exist: usb2, ulpi, hsic, pcie
0084 and sata. No extra resources are required for operation of these pads.
0085
0086 For Tegra210, the following pads exist: usb2, hsic, pcie and sata. Below is
0087 a description of the properties of each pad.
0088
0089 UTMI pad:
0090 ---------
0091
0092 Required properties:
0093 - clocks: Must contain an entry for each entry in clock-names.
0094 - clock-names: Must contain the following entries:
0095 - "trk": phandle and specifier referring to the USB2 tracking clock
0096
0097 HSIC pad:
0098 ---------
0099
0100 Required properties:
0101 - clocks: Must contain an entry for each entry in clock-names.
0102 - clock-names: Must contain the following entries:
0103 - "trk": phandle and specifier referring to the HSIC tracking clock
0104
0105 PCIe pad:
0106 ---------
0107
0108 Required properties:
0109 - clocks: Must contain an entry for each entry in clock-names.
0110 - clock-names: Must contain the following entries:
0111 - "pll": phandle and specifier referring to the PLLE
0112 - resets: Must contain an entry for each entry in reset-names.
0113 - reset-names: Must contain the following entries:
0114 - "phy": reset for the PCIe UPHY block
0115
0116 SATA pad:
0117 ---------
0118
0119 Required properties:
0120 - resets: Must contain an entry for each entry in reset-names.
0121 - reset-names: Must contain the following entries:
0122 - "phy": reset for the SATA UPHY block
0123
0124
0125 PHY nodes:
0126 ==========
0127
0128 Each pad node has a child named "lanes" that contains one or more children of
0129 its own, each representing one of the lanes controlled by the pad.
0130
0131 Required properties:
0132 --------------------
0133 - status: Defines the operation status of the PHY. Valid values are:
0134 - "disabled": the PHY is disabled
0135 - "okay": the PHY is enabled
0136 - #phy-cells: Should be 0. Since each lane represents a single PHY, there is
0137 no need for an additional specifier.
0138 - nvidia,function: The output function of the PHY. See below for a list of
0139 valid functions per SoC generation.
0140
0141 For Tegra124 and Tegra132, the list of valid PHY nodes is given below:
0142 - usb2: usb2-0, usb2-1, usb2-2
0143 - functions: "snps", "xusb", "uart"
0144 - ulpi: ulpi-0
0145 - functions: "snps", "xusb"
0146 - hsic: hsic-0, hsic-1
0147 - functions: "snps", "xusb"
0148 - pcie: pcie-0, pcie-1, pcie-2, pcie-3, pcie-4
0149 - functions: "pcie", "usb3-ss"
0150 - sata: sata-0
0151 - functions: "usb3-ss", "sata"
0152
0153 For Tegra210, the list of valid PHY nodes is given below:
0154 - usb2: usb2-0, usb2-1, usb2-2, usb2-3
0155 - functions: "snps", "xusb", "uart"
0156 - hsic: hsic-0, hsic-1
0157 - functions: "snps", "xusb"
0158 - pcie: pcie-0, pcie-1, pcie-2, pcie-3, pcie-4, pcie-5, pcie-6
0159 - functions: "pcie-x1", "usb3-ss", "pcie-x4"
0160 - sata: sata-0
0161 - functions: "usb3-ss", "sata"
0162
0163 For Tegra194, the list of valid PHY nodes is given below:
0164 - usb2: usb2-0, usb2-1, usb2-2, usb2-3
0165 - functions: "xusb"
0166 - usb3: usb3-0, usb3-1, usb3-2, usb3-3
0167 - functions: "xusb"
0168
0169 Port nodes:
0170 ===========
0171
0172 A required child node named "ports" contains a list of all the ports exposed
0173 by the XUSB pad controller. Per-port configuration is only required for USB.
0174
0175 USB2 ports:
0176 -----------
0177
0178 Required properties:
0179 - status: Defines the operation status of the port. Valid values are:
0180 - "disabled": the port is disabled
0181 - "okay": the port is enabled
0182 - mode: A string that determines the mode in which to run the port. Valid
0183 values are:
0184 - "host": for USB host mode
0185 - "device": for USB device mode
0186 - "otg": for USB OTG mode
0187
0188 Required properties for OTG/Peripheral capable USB2 ports:
0189 - usb-role-switch: Boolean property to indicate that the port support OTG or
0190 peripheral mode. If present, the port supports switching between USB host
0191 and peripheral roles. Connector should be added as subnode.
0192 See usb/usb-conn-gpio.txt.
0193
0194 Optional properties:
0195 - nvidia,internal: A boolean property whose presence determines that a port
0196 is internal. In the absence of this property the port is considered to be
0197 external.
0198 - vbus-supply: phandle to a regulator supplying the VBUS voltage.
0199
0200 ULPI ports:
0201 -----------
0202
0203 Optional properties:
0204 - status: Defines the operation status of the port. Valid values are:
0205 - "disabled": the port is disabled
0206 - "okay": the port is enabled
0207 - nvidia,internal: A boolean property whose presence determines that a port
0208 is internal. In the absence of this property the port is considered to be
0209 external.
0210 - vbus-supply: phandle to a regulator supplying the VBUS voltage.
0211
0212 HSIC ports:
0213 -----------
0214
0215 Required properties:
0216 - status: Defines the operation status of the port. Valid values are:
0217 - "disabled": the port is disabled
0218 - "okay": the port is enabled
0219
0220 Optional properties:
0221 - vbus-supply: phandle to a regulator supplying the VBUS voltage.
0222
0223 Super-speed USB ports:
0224 ----------------------
0225
0226 Required properties:
0227 - status: Defines the operation status of the port. Valid values are:
0228 - "disabled": the port is disabled
0229 - "okay": the port is enabled
0230 - nvidia,usb2-companion: A single cell that specifies the physical port number
0231 to map this super-speed USB port to. The range of valid port numbers varies
0232 with the SoC generation:
0233 - 0-2: for Tegra124 and Tegra132
0234 - 0-3: for Tegra210
0235
0236 Optional properties:
0237 - nvidia,internal: A boolean property whose presence determines that a port
0238 is internal. In the absence of this property the port is considered to be
0239 external.
0240
0241 - maximum-speed: Only for Tegra194. A string property that specifies maximum
0242 supported speed of a usb3 port. Valid values are:
0243 - "super-speed-plus": default, the usb3 port supports USB 3.1 Gen 2 speed.
0244 - "super-speed": the usb3 port supports USB 3.1 Gen 1 speed only.
0245
0246 For Tegra124 and Tegra132, the XUSB pad controller exposes the following
0247 ports:
0248 - 3x USB2: usb2-0, usb2-1, usb2-2
0249 - 1x ULPI: ulpi-0
0250 - 2x HSIC: hsic-0, hsic-1
0251 - 2x super-speed USB: usb3-0, usb3-1
0252
0253 For Tegra210, the XUSB pad controller exposes the following ports:
0254 - 4x USB2: usb2-0, usb2-1, usb2-2, usb2-3
0255 - 2x HSIC: hsic-0, hsic-1
0256 - 4x super-speed USB: usb3-0, usb3-1, usb3-2, usb3-3
0257
0258 For Tegra194, the XUSB pad controller exposes the following ports:
0259 - 4x USB2: usb2-0, usb2-1, usb2-2, usb2-3
0260 - 4x super-speed USB: usb3-0, usb3-1, usb3-2, usb3-3
0261
0262 Examples:
0263 =========
0264
0265 Tegra124 and Tegra132:
0266 ----------------------
0267
0268 SoC include:
0269
0270 padctl@7009f000 {
0271 /* for Tegra124 */
0272 compatible = "nvidia,tegra124-xusb-padctl";
0273 /* for Tegra132 */
0274 compatible = "nvidia,tegra132-xusb-padctl",
0275 "nvidia,tegra124-xusb-padctl";
0276 reg = <0x0 0x7009f000 0x0 0x1000>;
0277 resets = <&tegra_car 142>;
0278 reset-names = "padctl";
0279
0280 pads {
0281 usb2 {
0282 status = "disabled";
0283
0284 lanes {
0285 usb2-0 {
0286 status = "disabled";
0287 #phy-cells = <0>;
0288 };
0289
0290 usb2-1 {
0291 status = "disabled";
0292 #phy-cells = <0>;
0293 };
0294
0295 usb2-2 {
0296 status = "disabled";
0297 #phy-cells = <0>;
0298 };
0299 };
0300 };
0301
0302 ulpi {
0303 status = "disabled";
0304
0305 lanes {
0306 ulpi-0 {
0307 status = "disabled";
0308 #phy-cells = <0>;
0309 };
0310 };
0311 };
0312
0313 hsic {
0314 status = "disabled";
0315
0316 lanes {
0317 hsic-0 {
0318 status = "disabled";
0319 #phy-cells = <0>;
0320 };
0321
0322 hsic-1 {
0323 status = "disabled";
0324 #phy-cells = <0>;
0325 };
0326 };
0327 };
0328
0329 pcie {
0330 status = "disabled";
0331
0332 lanes {
0333 pcie-0 {
0334 status = "disabled";
0335 #phy-cells = <0>;
0336 };
0337
0338 pcie-1 {
0339 status = "disabled";
0340 #phy-cells = <0>;
0341 };
0342
0343 pcie-2 {
0344 status = "disabled";
0345 #phy-cells = <0>;
0346 };
0347
0348 pcie-3 {
0349 status = "disabled";
0350 #phy-cells = <0>;
0351 };
0352
0353 pcie-4 {
0354 status = "disabled";
0355 #phy-cells = <0>;
0356 };
0357 };
0358 };
0359
0360 sata {
0361 status = "disabled";
0362
0363 lanes {
0364 sata-0 {
0365 status = "disabled";
0366 #phy-cells = <0>;
0367 };
0368 };
0369 };
0370 };
0371
0372 ports {
0373 usb2-0 {
0374 status = "disabled";
0375 };
0376
0377 usb2-1 {
0378 status = "disabled";
0379 };
0380
0381 usb2-2 {
0382 status = "disabled";
0383 };
0384
0385 ulpi-0 {
0386 status = "disabled";
0387 };
0388
0389 hsic-0 {
0390 status = "disabled";
0391 };
0392
0393 hsic-1 {
0394 status = "disabled";
0395 };
0396
0397 usb3-0 {
0398 status = "disabled";
0399 };
0400
0401 usb3-1 {
0402 status = "disabled";
0403 };
0404 };
0405 };
0406
0407 Board file:
0408
0409 padctl@7009f000 {
0410 status = "okay";
0411
0412 pads {
0413 usb2 {
0414 status = "okay";
0415
0416 lanes {
0417 usb2-0 {
0418 nvidia,function = "xusb";
0419 status = "okay";
0420 };
0421
0422 usb2-1 {
0423 nvidia,function = "xusb";
0424 status = "okay";
0425 };
0426
0427 usb2-2 {
0428 nvidia,function = "xusb";
0429 status = "okay";
0430 };
0431 };
0432 };
0433
0434 pcie {
0435 status = "okay";
0436
0437 lanes {
0438 pcie-0 {
0439 nvidia,function = "usb3-ss";
0440 status = "okay";
0441 };
0442
0443 pcie-2 {
0444 nvidia,function = "pcie";
0445 status = "okay";
0446 };
0447
0448 pcie-4 {
0449 nvidia,function = "pcie";
0450 status = "okay";
0451 };
0452 };
0453 };
0454
0455 sata {
0456 status = "okay";
0457
0458 lanes {
0459 sata-0 {
0460 nvidia,function = "sata";
0461 status = "okay";
0462 };
0463 };
0464 };
0465 };
0466
0467 ports {
0468 /* Micro A/B */
0469 usb2-0 {
0470 status = "okay";
0471 mode = "otg";
0472 };
0473
0474 /* Mini PCIe */
0475 usb2-1 {
0476 status = "okay";
0477 mode = "host";
0478 };
0479
0480 /* USB3 */
0481 usb2-2 {
0482 status = "okay";
0483 mode = "host";
0484
0485 vbus-supply = <&vdd_usb3_vbus>;
0486 };
0487
0488 usb3-0 {
0489 nvidia,port = <2>;
0490 status = "okay";
0491 };
0492 };
0493 };
0494
0495 Tegra210:
0496 ---------
0497
0498 SoC include:
0499
0500 padctl@7009f000 {
0501 compatible = "nvidia,tegra210-xusb-padctl";
0502 reg = <0x0 0x7009f000 0x0 0x1000>;
0503 resets = <&tegra_car 142>;
0504 reset-names = "padctl";
0505
0506 status = "disabled";
0507
0508 pads {
0509 usb2 {
0510 clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>;
0511 clock-names = "trk";
0512 status = "disabled";
0513
0514 lanes {
0515 usb2-0 {
0516 status = "disabled";
0517 #phy-cells = <0>;
0518 };
0519
0520 usb2-1 {
0521 status = "disabled";
0522 #phy-cells = <0>;
0523 };
0524
0525 usb2-2 {
0526 status = "disabled";
0527 #phy-cells = <0>;
0528 };
0529
0530 usb2-3 {
0531 status = "disabled";
0532 #phy-cells = <0>;
0533 };
0534 };
0535 };
0536
0537 hsic {
0538 clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>;
0539 clock-names = "trk";
0540 status = "disabled";
0541
0542 lanes {
0543 hsic-0 {
0544 status = "disabled";
0545 #phy-cells = <0>;
0546 };
0547
0548 hsic-1 {
0549 status = "disabled";
0550 #phy-cells = <0>;
0551 };
0552 };
0553 };
0554
0555 pcie {
0556 clocks = <&tegra_car TEGRA210_CLK_PLL_E>;
0557 clock-names = "pll";
0558 resets = <&tegra_car 205>;
0559 reset-names = "phy";
0560 status = "disabled";
0561
0562 lanes {
0563 pcie-0 {
0564 status = "disabled";
0565 #phy-cells = <0>;
0566 };
0567
0568 pcie-1 {
0569 status = "disabled";
0570 #phy-cells = <0>;
0571 };
0572
0573 pcie-2 {
0574 status = "disabled";
0575 #phy-cells = <0>;
0576 };
0577
0578 pcie-3 {
0579 status = "disabled";
0580 #phy-cells = <0>;
0581 };
0582
0583 pcie-4 {
0584 status = "disabled";
0585 #phy-cells = <0>;
0586 };
0587
0588 pcie-5 {
0589 status = "disabled";
0590 #phy-cells = <0>;
0591 };
0592
0593 pcie-6 {
0594 status = "disabled";
0595 #phy-cells = <0>;
0596 };
0597 };
0598 };
0599
0600 sata {
0601 clocks = <&tegra_car TEGRA210_CLK_PLL_E>;
0602 clock-names = "pll";
0603 resets = <&tegra_car 204>;
0604 reset-names = "phy";
0605 status = "disabled";
0606
0607 lanes {
0608 sata-0 {
0609 status = "disabled";
0610 #phy-cells = <0>;
0611 };
0612 };
0613 };
0614 };
0615
0616 ports {
0617 usb2-0 {
0618 status = "disabled";
0619 };
0620
0621 usb2-1 {
0622 status = "disabled";
0623 };
0624
0625 usb2-2 {
0626 status = "disabled";
0627 };
0628
0629 usb2-3 {
0630 status = "disabled";
0631 };
0632
0633 hsic-0 {
0634 status = "disabled";
0635 };
0636
0637 hsic-1 {
0638 status = "disabled";
0639 };
0640
0641 usb3-0 {
0642 status = "disabled";
0643 };
0644
0645 usb3-1 {
0646 status = "disabled";
0647 };
0648
0649 usb3-2 {
0650 status = "disabled";
0651 };
0652
0653 usb3-3 {
0654 status = "disabled";
0655 };
0656 };
0657 };
0658
0659 Board file:
0660
0661 padctl@7009f000 {
0662 status = "okay";
0663
0664 pads {
0665 usb2 {
0666 status = "okay";
0667
0668 lanes {
0669 usb2-0 {
0670 nvidia,function = "xusb";
0671 status = "okay";
0672 };
0673
0674 usb2-1 {
0675 nvidia,function = "xusb";
0676 status = "okay";
0677 };
0678
0679 usb2-2 {
0680 nvidia,function = "xusb";
0681 status = "okay";
0682 };
0683
0684 usb2-3 {
0685 nvidia,function = "xusb";
0686 status = "okay";
0687 };
0688 };
0689 };
0690
0691 pcie {
0692 status = "okay";
0693
0694 lanes {
0695 pcie-0 {
0696 nvidia,function = "pcie-x1";
0697 status = "okay";
0698 };
0699
0700 pcie-1 {
0701 nvidia,function = "pcie-x4";
0702 status = "okay";
0703 };
0704
0705 pcie-2 {
0706 nvidia,function = "pcie-x4";
0707 status = "okay";
0708 };
0709
0710 pcie-3 {
0711 nvidia,function = "pcie-x4";
0712 status = "okay";
0713 };
0714
0715 pcie-4 {
0716 nvidia,function = "pcie-x4";
0717 status = "okay";
0718 };
0719
0720 pcie-5 {
0721 nvidia,function = "usb3-ss";
0722 status = "okay";
0723 };
0724
0725 pcie-6 {
0726 nvidia,function = "usb3-ss";
0727 status = "okay";
0728 };
0729 };
0730 };
0731
0732 sata {
0733 status = "okay";
0734
0735 lanes {
0736 sata-0 {
0737 nvidia,function = "sata";
0738 status = "okay";
0739 };
0740 };
0741 };
0742 };
0743
0744 ports {
0745 usb2-0 {
0746 status = "okay";
0747 mode = "otg";
0748 };
0749
0750 usb2-1 {
0751 status = "okay";
0752 vbus-supply = <&vdd_5v0_rtl>;
0753 mode = "host";
0754 };
0755
0756 usb2-2 {
0757 status = "okay";
0758 vbus-supply = <&vdd_usb_vbus>;
0759 mode = "host";
0760 };
0761
0762 usb2-3 {
0763 status = "okay";
0764 mode = "host";
0765 };
0766
0767 usb3-0 {
0768 status = "okay";
0769 nvidia,lanes = "pcie-6";
0770 nvidia,port = <1>;
0771 };
0772
0773 usb3-1 {
0774 status = "okay";
0775 nvidia,lanes = "pcie-5";
0776 nvidia,port = <2>;
0777 };
0778 };
0779 };
