0001 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Microchip Sparx5 Serdes controller
0008
0009 maintainers:
0010 - Steen Hegelund <steen.hegelund@microchip.com>
0011
0012 description: |
0013 The Sparx5 SERDES interfaces share the same basic functionality, but
0014 support different operating modes and line rates.
0015
0016 The following list lists the SERDES features:
0017
0018 * RX Adaptive Decision Feedback Equalizer (DFE)
0019 * Programmable continuous time linear equalizer (CTLE)
0020 * Rx variable gain control
0021 * Rx built-in fault detector (loss-of-lock/loss-of-signal)
0022 * Adjustable tx de-emphasis (FFE)
0023 * Tx output amplitude control
0024 * Supports rx eye monitor
0025 * Multiple loopback modes
0026 * Prbs generator and checker
0027 * Polarity inversion control
0028
0029 SERDES6G:
0030
0031 The SERDES6G is a high-speed SERDES interface, which can operate at
0032 the following data rates:
0033
0034 * 100 Mbps (100BASE-FX)
0035 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
0036 * 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
0037 * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
0038
0039 SERDES10G
0040
0041 The SERDES10G is a high-speed SERDES interface, which can operate at
0042 the following data rates:
0043
0044 * 100 Mbps (100BASE-FX)
0045 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
0046 * 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
0047 * 5 Gbps (QSGMII/USGMII)
0048 * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
0049 * 10 Gbps (10G-USGMII)
0050 * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
0051
0052 SERDES25G
0053
0054 The SERDES25G is a high-speed SERDES interface, which can operate at
0055 the following data rates:
0056
0057 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
0058 * 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
0059 * 5 Gbps (QSGMII/USGMII)
0060 * 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
0061 * 10 Gbps (10G-USGMII)
0062 * 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
0063 * 25.78125 Gbps (25GBASE-KR/25GBASE-CR/25GBASE-SR/25GBASE-LR/25GBASE-ER)
0064
0065 properties:
0066 $nodename:
0067 pattern: "^serdes@[0-9a-f]+$"
0068
0069 compatible:
0070 const: microchip,sparx5-serdes
0071
0072 reg:
0073 minItems: 1
0074
0075 '#phy-cells':
0076 const: 1
0077 description: |
0078 - The main serdes input port
0079
0080 clocks:
0081 maxItems: 1
0082
0083 required:
0084 - compatible
0085 - reg
0086 - '#phy-cells'
0087 - clocks
0088
0089 additionalProperties: false
0090
0091 examples:
0092 - |
0093 serdes: serdes@10808000 {
0094 compatible = "microchip,sparx5-serdes";
0095 #phy-cells = <1>;
0096 clocks = <&sys_clk>;
0097 reg = <0x10808000 0x5d0000>;
0098 };
0099
0100 ...
