0001 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/phy/microchip,lan966x-serdes.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Microchip Lan966x Serdes controller
0008
0009 maintainers:
0010 - Horatiu Vultur <horatiu.vultur@microchip.com>
0011
0012 description: |
0013 Lan966x has 7 interfaces, consisting of 2 copper transceivers(CU),
0014 3 SERDES6G and 2 RGMII interfaces. Two of the SERDES6G support QSGMII.
0015 Also it has 8 logical Ethernet ports which can be connected to these
0016 interfaces. The Serdes controller will allow to configure these interfaces
0017 and allows to "mux" the interfaces to different ports.
0018
0019 For simple selection of the interface that is used with a port, the
0020 following macros are defined CU(X), SERDES6G(X), RGMII(X). Where X is a
0021 number that represents the index of that interface type. For example
0022 CU(1) means use interface copper transceivers 1. SERDES6G(2) means use
0023 interface SerDes 2.
0024
0025 properties:
0026 $nodename:
0027 pattern: "^serdes@[0-9a-f]+$"
0028
0029 compatible:
0030 const: microchip,lan966x-serdes
0031
0032 reg:
0033 items:
0034 - description: HSIO registers
0035 - description: HW_STAT register
0036
0037 '#phy-cells':
0038 const: 2
0039 description: |
0040 - Input port to use for a given macro.
0041 - The macro to be used. The macros are defined in
0042 dt-bindings/phy/phy-lan966x-serdes.
0043
0044 required:
0045 - compatible
0046 - reg
0047 - '#phy-cells'
0048
0049 additionalProperties: false
0050
0051 examples:
0052 - |
0053 serdes: serdes@e2004010 {
0054 compatible = "microchip,lan966x-serdes";
0055 reg = <0xe202c000 0x9c>, <0xe2004010 0x4>;
0056 #phy-cells = <2>;
0057 };
0058
0059 ...
