0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 # Copyright (c) 2020 MediaTek
0003 %YAML 1.2
0004 ---
0005 $id: http://devicetree.org/schemas/phy/mediatek,ufs-phy.yaml#
0006 $schema: http://devicetree.org/meta-schemas/core.yaml#
0007
0008 title: MediaTek Universal Flash Storage (UFS) M-PHY binding
0009
0010 maintainers:
0011 - Stanley Chu <stanley.chu@mediatek.com>
0012 - Chunfeng Yun <chunfeng.yun@mediatek.com>
0013
0014 description: |
0015 UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro.
0016 Each UFS M-PHY node should have its own node.
0017 To bind UFS M-PHY with UFS host controller, the controller node should
0018 contain a phandle reference to UFS M-PHY node.
0019
0020 properties:
0021 $nodename:
0022 pattern: "^ufs-phy@[0-9a-f]+$"
0023
0024 compatible:
0025 oneOf:
0026 - items:
0027 - enum:
0028 - mediatek,mt8195-ufsphy
0029 - const: mediatek,mt8183-ufsphy
0030 - const: mediatek,mt8183-ufsphy
0031
0032 reg:
0033 maxItems: 1
0034
0035 clocks:
0036 items:
0037 - description: Unipro core control clock.
0038 - description: M-PHY core control clock.
0039
0040 clock-names:
0041 items:
0042 - const: unipro
0043 - const: mp
0044
0045 "#phy-cells":
0046 const: 0
0047
0048 required:
0049 - compatible
0050 - reg
0051 - "#phy-cells"
0052 - clocks
0053 - clock-names
0054
0055 additionalProperties: false
0056
0057 examples:
0058 - |
0059 #include <dt-bindings/clock/mt8183-clk.h>
0060 ufsphy: ufs-phy@11fa0000 {
0061 compatible = "mediatek,mt8183-ufsphy";
0062 reg = <0x11fa0000 0xc000>;
0063 clocks = <&infracfg CLK_INFRA_UNIPRO_SCK>,
0064 <&infracfg CLK_INFRA_UFS_MP_SAP_BCLK>;
0065 clock-names = "unipro", "mp";
0066 #phy-cells = <0>;
0067 };
0068
0069 ...
