0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 # Copyright (c) 2020 MediaTek
0003 %YAML 1.2
0004 ---
0005 $id: http://devicetree.org/schemas/phy/mediatek,dsi-phy.yaml#
0006 $schema: http://devicetree.org/meta-schemas/core.yaml#
0007
0008 title: MediaTek MIPI Display Serial Interface (DSI) PHY binding
0009
0010 maintainers:
0011 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
0012 - Philipp Zabel <p.zabel@pengutronix.de>
0013 - Chunfeng Yun <chunfeng.yun@mediatek.com>
0014
0015 description: The MIPI DSI PHY supports up to 4-lane output.
0016
0017 properties:
0018 $nodename:
0019 pattern: "^dsi-phy@[0-9a-f]+$"
0020
0021 compatible:
0022 oneOf:
0023 - items:
0024 - enum:
0025 - mediatek,mt7623-mipi-tx
0026 - const: mediatek,mt2701-mipi-tx
0027 - items:
0028 - enum:
0029 - mediatek,mt8365-mipi-tx
0030 - const: mediatek,mt8183-mipi-tx
0031 - const: mediatek,mt2701-mipi-tx
0032 - const: mediatek,mt8173-mipi-tx
0033 - const: mediatek,mt8183-mipi-tx
0034
0035 reg:
0036 maxItems: 1
0037
0038 clocks:
0039 items:
0040 - description: PLL reference clock
0041
0042 clock-output-names:
0043 maxItems: 1
0044
0045 "#phy-cells":
0046 const: 0
0047
0048 "#clock-cells":
0049 const: 0
0050
0051 nvmem-cells:
0052 maxItems: 1
0053 description: A phandle to the calibration data provided by a nvmem device,
0054 if unspecified, default values shall be used.
0055
0056 nvmem-cell-names:
0057 items:
0058 - const: calibration-data
0059
0060 drive-strength-microamp:
0061 description: adjust driving current
0062 multipleOf: 200
0063 minimum: 2000
0064 maximum: 6000
0065 default: 4600
0066
0067 required:
0068 - compatible
0069 - reg
0070 - clocks
0071 - clock-output-names
0072 - "#phy-cells"
0073 - "#clock-cells"
0074
0075 additionalProperties: false
0076
0077 examples:
0078 - |
0079 #include <dt-bindings/clock/mt8173-clk.h>
0080 dsi-phy@10215000 {
0081 compatible = "mediatek,mt8173-mipi-tx";
0082 reg = <0x10215000 0x1000>;
0083 clocks = <&clk26m>;
0084 clock-output-names = "mipi_tx0_pll";
0085 drive-strength-microamp = <4000>;
0086 nvmem-cells= <&mipi_tx_calibration>;
0087 nvmem-cell-names = "calibration-data";
0088 #clock-cells = <0>;
0089 #phy-cells = <0>;
0090 };
0091
0092 ...
