0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Intel Lightning Mountain(LGM) eMMC PHY Device Tree Bindings
0008
0009 maintainers:
0010 - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
0011
0012 description: |+
0013 Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon
0014 node is used to reference the base address of eMMC phy registers.
0015
0016 The eMMC PHY node should be the child of a syscon node with the
0017 required property:
0018
0019 - compatible: Should be one of the following:
0020 "intel,lgm-syscon", "syscon"
0021 - reg:
0022 maxItems: 1
0023
0024 properties:
0025 compatible:
0026 enum:
0027 - intel,lgm-emmc-phy
0028 - intel,keembay-emmc-phy
0029
0030 "#phy-cells":
0031 const: 0
0032
0033 reg:
0034 maxItems: 1
0035
0036 clocks:
0037 maxItems: 1
0038
0039 clock-names:
0040 items:
0041 - const: emmcclk
0042
0043 required:
0044 - "#phy-cells"
0045 - compatible
0046 - reg
0047 - clocks
0048
0049 additionalProperties: false
0050
0051 examples:
0052 - |
0053 sysconf: chiptop@e0200000 {
0054 compatible = "intel,lgm-syscon", "syscon";
0055 reg = <0xe0200000 0x100>;
0056 #address-cells = <1>;
0057 #size-cells = <1>;
0058
0059 emmc_phy: emmc-phy@a8 {
0060 compatible = "intel,lgm-emmc-phy";
0061 reg = <0x00a8 0x10>;
0062 clocks = <&emmc>;
0063 #phy-cells = <0>;
0064 };
0065 };
0066
0067 - |
0068 phy@20290000 {
0069 compatible = "intel,keembay-emmc-phy";
0070 reg = <0x20290000 0x54>;
0071 clocks = <&emmc>;
0072 clock-names = "emmcclk";
0073 #phy-cells = <0>;
0074 };
0075 ...
