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OSCL-LXR

 
 

    


0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/phy/cdns,dphy.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Cadence DPHY Device Tree Bindings
0008 
0009 maintainers:
0010   - Pratyush Yadav <p.yadav@ti.com>
0011 
0012 properties:
0013   compatible:
0014     enum:
0015       - cdns,dphy
0016       - ti,j721e-dphy
0017 
0018   reg:
0019     maxItems: 1
0020 
0021   clocks:
0022     items:
0023       - description: PMA state machine clock
0024       - description: PLL reference clock
0025 
0026   clock-names:
0027     items:
0028       - const: psm
0029       - const: pll_ref
0030 
0031   "#phy-cells":
0032     const: 0
0033 
0034   power-domains:
0035     maxItems: 1
0036 
0037 required:
0038   - compatible
0039   - reg
0040   - clocks
0041   - clock-names
0042   - "#phy-cells"
0043 
0044 additionalProperties: false
0045 
0046 examples:
0047   - |
0048     #include <dt-bindings/soc/ti,sci_pm_domain.h>
0049 
0050     dphy0: phy@fd0e0000{
0051         compatible = "cdns,dphy";
0052         reg = <0xfd0e0000 0x1000>;
0053         clocks = <&psm_clk>, <&pll_ref_clk>;
0054         clock-names = "psm", "pll_ref";
0055         power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
0056         #phy-cells = <0>;
0057     };