0001 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/phy/brcm,cygnus-pcie-phy.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Broadcom Cygnus PCIe PHY
0008
0009 maintainers:
0010 - Ray Jui <ray.jui@broadcom.com>
0011 - Scott Branden <scott.branden@broadcom.com>
0012
0013 properties:
0014 $nodename:
0015 pattern: "^pcie[-|_]phy(@.*)?$"
0016
0017 compatible:
0018 items:
0019 - const: brcm,cygnus-pcie-phy
0020
0021 reg:
0022 maxItems: 1
0023 description: >
0024 Base address and length of the PCIe PHY block
0025
0026 "#address-cells":
0027 const: 1
0028
0029 "#size-cells":
0030 const: 0
0031
0032 patternProperties:
0033 "^pcie-phy@[0-9]+$":
0034 type: object
0035 description: >
0036 PCIe PHY child nodes
0037
0038 properties:
0039 reg:
0040 maxItems: 1
0041 description: >
0042 The PCIe PHY port number
0043
0044 "#phy-cells":
0045 const: 0
0046
0047 required:
0048 - reg
0049 - "#phy-cells"
0050
0051 required:
0052 - compatible
0053 - reg
0054 - "#address-cells"
0055 - "#size-cells"
0056
0057 additionalProperties: false
0058
0059 examples:
0060 - |
0061 pcie_phy: pcie_phy@301d0a0 {
0062 compatible = "brcm,cygnus-pcie-phy";
0063 reg = <0x0301d0a0 0x14>;
0064 #address-cells = <1>;
0065 #size-cells = <0>;
0066
0067 pcie0_phy: pcie-phy@0 {
0068 reg = <0>;
0069 #phy-cells = <0>;
0070 };
0071
0072 pcie1_phy: pcie-phy@1 {
0073 reg = <1>;
0074 #phy-cells = <0>;
0075 };
0076 };
