bindings/phy/allwinner%2Csun9i-a80-usb-phy.yaml

0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/phy/allwinner,sun9i-a80-usb-phy.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Allwinner A80 USB PHY Device Tree Bindings
0008
0009 maintainers:
0010   - Chen-Yu Tsai <wens@csie.org>
0011   - Maxime Ripard <mripard@kernel.org>
0012
0013 properties:
0014   "#phy-cells":
0015     const: 0
0016
0017   compatible:
0018     const: allwinner,sun9i-a80-usb-phy
0019
0020   reg:
0021     maxItems: 1
0022
0023   clocks:
0024     anyOf:
0025       - maxItems: 1
0026         description: Main PHY Clock
0027
0028       - items:
0029           - description: Main PHY clock
0030           - description: HSIC 12MHz clock
0031           - description: HSIC 480MHz clock
0032
0033   clock-names:
0034     oneOf:
0035       - const: phy
0036
0037       - items:
0038           - const: phy
0039           - const: hsic_12M
0040           - const: hsic_480M
0041
0042   resets:
0043     minItems: 1
0044     items:
0045       - description: Normal USB PHY reset
0046       - description: HSIC Reset
0047
0048   reset-names:
0049     minItems: 1
0050     items:
0051       - const: phy
0052       - const: hsic
0053
0054   phy_type:
0055     const: hsic
0056     description:
0057       When absent, the PHY type will be assumed to be normal USB.
0058
0059   phy-supply:
0060     description:
0061       Regulator that powers VBUS
0062
0063 required:
0064   - "#phy-cells"
0065   - compatible
0066   - reg
0067   - clocks
0068   - clock-names
0069   - resets
0070   - reset-names
0071
0072 additionalProperties: false
0073
0074 if:
0075   properties:
0076     phy_type:
0077       const: hsic
0078
0079   required:
0080     - phy_type
0081
0082 then:
0083   properties:
0084     clocks:
0085       maxItems: 3
0086
0087     clock-names:
0088       maxItems: 3
0089
0090     resets:
0091       maxItems: 2
0092
0093     reset-names:
0094       maxItems: 2
0095
0096 examples:
0097   - |
0098     #include <dt-bindings/clock/sun9i-a80-usb.h>
0099     #include <dt-bindings/reset/sun9i-a80-usb.h>
0100
0101     usbphy1: phy@a00800 {
0102         compatible = "allwinner,sun9i-a80-usb-phy";
0103         reg = <0x00a00800 0x4>;
0104         clocks = <&usb_clocks CLK_USB0_PHY>;
0105         clock-names = "phy";
0106         resets = <&usb_clocks RST_USB0_PHY>;
0107         reset-names = "phy";
0108         phy-supply = <&reg_usb1_vbus>;
0109         #phy-cells = <0>;
0110     };
0111
0112   - |
0113     #include <dt-bindings/clock/sun9i-a80-usb.h>
0114     #include <dt-bindings/reset/sun9i-a80-usb.h>
0115
0116     usbphy3: phy@a02800 {
0117         compatible = "allwinner,sun9i-a80-usb-phy";
0118         reg = <0x00a02800 0x4>;
0119         clocks = <&usb_clocks CLK_USB2_PHY>,
0120                  <&usb_clocks CLK_USB_HSIC>,
0121                  <&usb_clocks CLK_USB2_HSIC>;
0122         clock-names = "phy",
0123                       "hsic_12M",
0124                       "hsic_480M";
0125         resets = <&usb_clocks RST_USB2_PHY>,
0126                  <&usb_clocks RST_USB2_HSIC>;
0127         reset-names = "phy",
0128                       "hsic";
0129         phy_type = "hsic";
0130         phy-supply = <&reg_usb3_vbus>;
0131         #phy-cells = <0>;
0132     };