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0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-a83t-usb-phy.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Allwinner A83t USB PHY Device Tree Bindings
0008 
0009 maintainers:
0010   - Chen-Yu Tsai <wens@csie.org>
0011   - Maxime Ripard <mripard@kernel.org>
0012 
0013 properties:
0014   "#phy-cells":
0015     const: 1
0016 
0017   compatible:
0018     const: allwinner,sun8i-a83t-usb-phy
0019 
0020   reg:
0021     items:
0022       - description: PHY Control registers
0023       - description: PHY PMU1 registers
0024       - description: PHY PMU2 registers
0025 
0026   reg-names:
0027     items:
0028       - const: phy_ctrl
0029       - const: pmu1
0030       - const: pmu2
0031 
0032   clocks:
0033     items:
0034       - description: USB OTG PHY bus clock
0035       - description: USB Host 0 PHY bus clock
0036       - description: USB Host 1 PHY bus clock
0037       - description: USB HSIC 12MHz clock
0038 
0039   clock-names:
0040     items:
0041       - const: usb0_phy
0042       - const: usb1_phy
0043       - const: usb2_phy
0044       - const: usb2_hsic_12M
0045 
0046   resets:
0047     items:
0048       - description: USB OTG reset
0049       - description: USB Host 1 Controller reset
0050       - description: USB Host 2 Controller reset
0051 
0052   reset-names:
0053     items:
0054       - const: usb0_reset
0055       - const: usb1_reset
0056       - const: usb2_reset
0057 
0058   usb0_id_det-gpios:
0059     maxItems: 1
0060     description: GPIO to the USB OTG ID pin
0061 
0062   usb0_vbus_det-gpios:
0063     maxItems: 1
0064     description: GPIO to the USB OTG VBUS detect pin
0065 
0066   usb0_vbus_power-supply:
0067     description: Power supply to detect the USB OTG VBUS
0068 
0069   usb0_vbus-supply:
0070     description: Regulator controlling USB OTG VBUS
0071 
0072   usb1_vbus-supply:
0073     description: Regulator controlling USB1 Host controller
0074 
0075   usb2_vbus-supply:
0076     description: Regulator controlling USB2 Host controller
0077 
0078 required:
0079   - "#phy-cells"
0080   - compatible
0081   - clocks
0082   - clock-names
0083   - reg
0084   - reg-names
0085   - resets
0086   - reset-names
0087 
0088 additionalProperties: false
0089 
0090 examples:
0091   - |
0092     #include <dt-bindings/gpio/gpio.h>
0093     #include <dt-bindings/clock/sun8i-a83t-ccu.h>
0094     #include <dt-bindings/reset/sun8i-a83t-ccu.h>
0095 
0096     phy@1c19400 {
0097         #phy-cells = <1>;
0098         compatible = "allwinner,sun8i-a83t-usb-phy";
0099         reg = <0x01c19400 0x10>,
0100               <0x01c1a800 0x14>,
0101               <0x01c1b800 0x14>;
0102         reg-names = "phy_ctrl",
0103                     "pmu1",
0104                     "pmu2";
0105         clocks = <&ccu CLK_USB_PHY0>,
0106                  <&ccu CLK_USB_PHY1>,
0107                  <&ccu CLK_USB_HSIC>,
0108                  <&ccu CLK_USB_HSIC_12M>;
0109         clock-names = "usb0_phy",
0110                       "usb1_phy",
0111                       "usb2_phy",
0112                       "usb2_hsic_12M";
0113         resets = <&ccu RST_USB_PHY0>,
0114                  <&ccu RST_USB_PHY1>,
0115                  <&ccu RST_USB_HSIC>;
0116         reset-names = "usb0_reset",
0117                       "usb1_reset",
0118                       "usb2_reset";
0119         usb0_id_det-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
0120         usb0_vbus_power-supply = <&usb_power_supply>;
0121         usb0_vbus-supply = <&reg_drivevbus>;
0122         usb1_vbus-supply = <&reg_usb1_vbus>;
0123         usb2_vbus-supply = <&reg_usb2_vbus>;
0124     };