bindings/perf/fsl-imx-ddr.yaml

0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/perf/fsl-imx-ddr.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Freescale(NXP) IMX8 DDR performance monitor
0008
0009 maintainers:
0010   - Frank Li <frank.li@nxp.com>
0011
0012 properties:
0013   compatible:
0014     oneOf:
0015       - enum:
0016           - fsl,imx8-ddr-pmu
0017           - fsl,imx8m-ddr-pmu
0018           - fsl,imx8mq-ddr-pmu
0019           - fsl,imx8mm-ddr-pmu
0020           - fsl,imx8mn-ddr-pmu
0021           - fsl,imx8mp-ddr-pmu
0022       - items:
0023           - enum:
0024               - fsl,imx8mm-ddr-pmu
0025               - fsl,imx8mn-ddr-pmu
0026               - fsl,imx8mq-ddr-pmu
0027               - fsl,imx8mp-ddr-pmu
0028           - const: fsl,imx8m-ddr-pmu
0029
0030   reg:
0031     maxItems: 1
0032
0033   interrupts:
0034     maxItems: 1
0035
0036 required:
0037   - compatible
0038   - reg
0039   - interrupts
0040
0041 additionalProperties: false
0042
0043 examples:
0044   - |
0045     #include <dt-bindings/interrupt-controller/arm-gic.h>
0046
0047     ddr-pmu@5c020000 {
0048         compatible = "fsl,imx8-ddr-pmu";
0049         reg = <0x5c020000 0x10000>;
0050         interrupt-parent = <&gic>;
0051         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
0052     };