0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/pci/toshiba,visconti-pcie.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Toshiba Visconti5 SoC PCIe Host Controller Device Tree Bindings
0008
0009 maintainers:
0010 - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
0011
0012 description:
0013 Toshiba Visconti5 SoC PCIe host controller is based on the Synopsys DesignWare PCIe IP.
0014
0015 allOf:
0016 - $ref: /schemas/pci/snps,dw-pcie.yaml#
0017
0018 properties:
0019 compatible:
0020 const: toshiba,visconti-pcie
0021
0022 reg:
0023 items:
0024 - description: Data Bus Interface (DBI) registers.
0025 - description: PCIe configuration space region.
0026 - description: Visconti specific additional registers.
0027 - description: Visconti specific SMU registers
0028 - description: Visconti specific memory protection unit registers (MPU)
0029
0030 reg-names:
0031 items:
0032 - const: dbi
0033 - const: config
0034 - const: ulreg
0035 - const: smu
0036 - const: mpu
0037
0038 interrupts:
0039 maxItems: 1
0040
0041 clocks:
0042 items:
0043 - description: PCIe reference clock
0044 - description: PCIe system clock
0045 - description: Auxiliary clock
0046
0047 clock-names:
0048 items:
0049 - const: ref
0050 - const: core
0051 - const: aux
0052
0053 num-lanes:
0054 const: 2
0055
0056 required:
0057 - reg
0058 - reg-names
0059 - interrupts
0060 - "#interrupt-cells"
0061 - interrupt-map
0062 - interrupt-map-mask
0063 - num-lanes
0064 - clocks
0065 - clock-names
0066 - max-link-speed
0067
0068 unevaluatedProperties: false
0069
0070 examples:
0071 - |
0072 #include <dt-bindings/interrupt-controller/irq.h>
0073 #include <dt-bindings/interrupt-controller/arm-gic.h>
0074
0075 soc {
0076 #address-cells = <2>;
0077 #size-cells = <2>;
0078
0079 pcie: pcie@28400000 {
0080 compatible = "toshiba,visconti-pcie";
0081 reg = <0x0 0x28400000 0x0 0x00400000>,
0082 <0x0 0x70000000 0x0 0x10000000>,
0083 <0x0 0x28050000 0x0 0x00010000>,
0084 <0x0 0x24200000 0x0 0x00002000>,
0085 <0x0 0x24162000 0x0 0x00001000>;
0086 reg-names = "dbi", "config", "ulreg", "smu", "mpu";
0087 device_type = "pci";
0088 bus-range = <0x00 0xff>;
0089 num-lanes = <2>;
0090 num-viewport = <8>;
0091
0092 #address-cells = <3>;
0093 #size-cells = <2>;
0094 #interrupt-cells = <1>;
0095 ranges = <0x81000000 0 0x40000000 0 0x40000000 0 0x00010000>,
0096 <0x82000000 0 0x50000000 0 0x50000000 0 0x20000000>;
0097 interrupts = <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
0098 interrupt-names = "intr";
0099 interrupt-map-mask = <0 0 0 7>;
0100 interrupt-map =
0101 <0 0 0 1 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
0102 0 0 0 2 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
0103 0 0 0 3 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
0104 0 0 0 4 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
0105 clocks = <&extclk100mhz>, <&clk600mhz>, <&clk25mhz>;
0106 clock-names = "ref", "core", "aux";
0107 max-link-speed = <2>;
0108 };
0109 };
0110 ...
