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0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 # Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
0003 %YAML 1.2
0004 ---
0005 $id: http://devicetree.org/schemas/pci/ti,am65-pci-host.yaml#
0006 $schema: http://devicetree.org/meta-schemas/core.yaml#
0007 
0008 title: TI AM65 PCI Host
0009 
0010 maintainers:
0011   - Kishon Vijay Abraham I <kishon@ti.com>
0012 
0013 allOf:
0014   - $ref: /schemas/pci/pci-bus.yaml#
0015 
0016 properties:
0017   compatible:
0018     enum:
0019       - ti,am654-pcie-rc
0020       - ti,keystone-pcie
0021 
0022   reg:
0023     maxItems: 4
0024 
0025   reg-names:
0026     items:
0027       - const: app
0028       - const: dbics
0029       - const: config
0030       - const: atu
0031 
0032   interrupts:
0033     maxItems: 1
0034 
0035   power-domains:
0036     maxItems: 1
0037 
0038   ti,syscon-pcie-id:
0039     $ref: /schemas/types.yaml#/definitions/phandle-array
0040     items:
0041       - items:
0042           - description: Phandle to the SYSCON entry
0043           - description: pcie_device_id register offset within SYSCON
0044     description: Phandle to the SYSCON entry required for getting PCIe device/vendor ID
0045 
0046   ti,syscon-pcie-mode:
0047     $ref: /schemas/types.yaml#/definitions/phandle-array
0048     items:
0049       - items:
0050           - description: Phandle to the SYSCON entry
0051           - description: pcie_ctrl register offset within SYSCON
0052     description: Phandle to the SYSCON entry required for configuring PCIe in RC or EP mode.
0053 
0054   msi-map: true
0055 
0056   dma-coherent: true
0057 
0058 required:
0059   - compatible
0060   - reg
0061   - reg-names
0062   - max-link-speed
0063   - ti,syscon-pcie-id
0064   - ti,syscon-pcie-mode
0065   - ranges
0066 
0067 if:
0068   properties:
0069     compatible:
0070       enum:
0071         - ti,am654-pcie-rc
0072 then:
0073   required:
0074     - dma-coherent
0075     - power-domains
0076     - msi-map
0077 
0078 unevaluatedProperties: false
0079 
0080 examples:
0081   - |
0082     #include <dt-bindings/interrupt-controller/arm-gic.h>
0083     #include <dt-bindings/interrupt-controller/irq.h>
0084     #include <dt-bindings/soc/ti,sci_pm_domain.h>
0085 
0086     pcie0_rc: pcie@5500000 {
0087         compatible = "ti,am654-pcie-rc";
0088         reg =  <0x5500000 0x1000>,
0089                <0x5501000 0x1000>,
0090                <0x10000000 0x2000>,
0091                <0x5506000 0x1000>;
0092         reg-names = "app", "dbics", "config", "atu";
0093         power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
0094         #address-cells = <3>;
0095         #size-cells = <2>;
0096         ranges = <0x81000000 0 0          0x10020000 0 0x00010000>,
0097                  <0x82000000 0 0x10030000 0x10030000 0 0x07FD0000>;
0098         ti,syscon-pcie-id = <&scm_conf 0x0210>;
0099         ti,syscon-pcie-mode = <&scm_conf 0x4060>;
0100         bus-range = <0x0 0xff>;
0101         max-link-speed = <2>;
0102         dma-coherent;
0103         interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
0104         msi-map = <0x0 &gic_its 0x0 0x10000>;
0105         device_type = "pci";
0106     };