0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/pci/socionext,uniphier-pcie-ep.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Socionext UniPhier PCIe endpoint controller
0008
0009 description: |
0010 UniPhier PCIe endpoint controller is based on the Synopsys DesignWare
0011 PCI core. It shares common features with the PCIe DesignWare core and
0012 inherits common properties defined in
0013 Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml.
0014
0015 maintainers:
0016 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
0017
0018 allOf:
0019 - $ref: /schemas/pci/snps,dw-pcie-ep.yaml#
0020
0021 properties:
0022 compatible:
0023 enum:
0024 - socionext,uniphier-pro5-pcie-ep
0025 - socionext,uniphier-nx1-pcie-ep
0026
0027 reg:
0028 minItems: 4
0029 maxItems: 5
0030
0031 reg-names:
0032 oneOf:
0033 - items:
0034 - const: dbi
0035 - const: dbi2
0036 - const: link
0037 - const: addr_space
0038 - items:
0039 - const: dbi
0040 - const: dbi2
0041 - const: link
0042 - const: addr_space
0043 - const: atu
0044
0045 clocks:
0046 minItems: 1
0047 maxItems: 2
0048
0049 clock-names:
0050 oneOf:
0051 - items: # for Pro5
0052 - const: gio
0053 - const: link
0054 - const: link # for NX1
0055
0056 resets:
0057 minItems: 1
0058 maxItems: 2
0059
0060 reset-names:
0061 oneOf:
0062 - items: # for Pro5
0063 - const: gio
0064 - const: link
0065 - const: link # for NX1
0066
0067 num-ib-windows:
0068 const: 16
0069
0070 num-ob-windows:
0071 const: 16
0072
0073 num-lanes: true
0074
0075 phys:
0076 maxItems: 1
0077
0078 phy-names:
0079 const: pcie-phy
0080
0081 required:
0082 - compatible
0083 - reg
0084 - reg-names
0085 - clocks
0086 - clock-names
0087 - resets
0088 - reset-names
0089
0090 unevaluatedProperties: false
0091
0092 examples:
0093 - |
0094 pcie_ep: pcie-ep@66000000 {
0095 compatible = "socionext,uniphier-pro5-pcie-ep";
0096 reg-names = "dbi", "dbi2", "link", "addr_space";
0097 reg = <0x66000000 0x1000>, <0x66001000 0x1000>,
0098 <0x66010000 0x10000>, <0x67000000 0x400000>;
0099 clock-names = "gio", "link";
0100 clocks = <&sys_clk 12>, <&sys_clk 24>;
0101 reset-names = "gio", "link";
0102 resets = <&sys_rst 12>, <&sys_rst 24>;
0103 num-ib-windows = <16>;
0104 num-ob-windows = <16>;
0105 num-lanes = <4>;
0106 phy-names = "pcie-phy";
0107 phys = <&pcie_phy>;
0108 };