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0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/pci/renesas,pci-rcar-gen2.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Renesas AHB to PCI bridge
0008 
0009 maintainers:
0010   - Marek Vasut <marek.vasut+renesas@gmail.com>
0011   - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
0012 
0013 description: |
0014   This is the bridge used internally to connect the USB controllers to the
0015   AHB. There is one bridge instance per USB port connected to the internal
0016   OHCI and EHCI controllers.
0017 
0018 properties:
0019   compatible:
0020     oneOf:
0021       - items:
0022           - enum:
0023               - renesas,pci-r8a7742      # RZ/G1H
0024               - renesas,pci-r8a7743      # RZ/G1M
0025               - renesas,pci-r8a7744      # RZ/G1N
0026               - renesas,pci-r8a7745      # RZ/G1E
0027               - renesas,pci-r8a7790      # R-Car H2
0028               - renesas,pci-r8a7791      # R-Car M2-W
0029               - renesas,pci-r8a7793      # R-Car M2-N
0030               - renesas,pci-r8a7794      # R-Car E2
0031           - const: renesas,pci-rcar-gen2 # R-Car Gen2 and RZ/G1
0032       - items:
0033           - enum:
0034               - renesas,pci-r9a06g032     # RZ/N1D
0035           - const: renesas,pci-rzn1       # RZ/N1
0036 
0037   reg:
0038     items:
0039       - description: Operational registers for the OHCI/EHCI controllers.
0040       - description: Bridge configuration and control registers.
0041 
0042   interrupts:
0043     maxItems: 1
0044 
0045   clocks: true
0046 
0047   clock-names: true
0048 
0049   resets:
0050     maxItems: 1
0051 
0052   power-domains:
0053     maxItems: 1
0054 
0055   bus-range:
0056     description: |
0057       The PCI bus number range; as this is a single bus, the range
0058       should be specified as the same value twice.
0059 
0060   dma-ranges:
0061     description: |
0062       A single range for the inbound memory region. If not supplied,
0063       defaults to 1GiB at 0x40000000. Note there are hardware restrictions on
0064       the allowed combinations of address and size.
0065     maxItems: 1
0066 
0067 patternProperties:
0068   'usb@[0-1],0':
0069     type: object
0070 
0071     description:
0072       This a USB controller PCI device
0073 
0074     properties:
0075       reg:
0076         description:
0077           Identify the correct bus, device and function number in the
0078           form <bdf 0 0 0 0>.
0079 
0080         items:
0081           minItems: 5
0082           maxItems: 5
0083 
0084       phys:
0085         description:
0086           Reference to the USB phy
0087         maxItems: 1
0088 
0089       phy-names:
0090         maxItems: 1
0091 
0092     required:
0093       - reg
0094       - phys
0095       - phy-names
0096 
0097     unevaluatedProperties: false
0098 
0099 required:
0100   - compatible
0101   - reg
0102   - interrupts
0103   - interrupt-map
0104   - interrupt-map-mask
0105   - clocks
0106   - power-domains
0107   - bus-range
0108   - "#address-cells"
0109   - "#size-cells"
0110   - "#interrupt-cells"
0111 
0112 allOf:
0113   - $ref: /schemas/pci/pci-bus.yaml#
0114 
0115   - if:
0116       properties:
0117         compatible:
0118           contains:
0119             enum:
0120               - renesas,pci-rzn1
0121     then:
0122       properties:
0123         clocks:
0124           items:
0125             - description: Internal bus clock (AHB) for HOST
0126             - description: Internal bus clock (AHB) Power Management
0127             - description: PCI clock for USB subsystem
0128         clock-names:
0129           items:
0130             - const: hclkh
0131             - const: hclkpm
0132             - const: pciclk
0133       required:
0134         - clock-names
0135     else:
0136       properties:
0137         clocks:
0138           items:
0139             - description: Device clock
0140         clock-names:
0141           items:
0142             - const: pclk
0143       required:
0144         - resets
0145 
0146 unevaluatedProperties: false
0147 
0148 examples:
0149   - |
0150     #include <dt-bindings/interrupt-controller/arm-gic.h>
0151     #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
0152     #include <dt-bindings/power/r8a7790-sysc.h>
0153 
0154     pci@ee090000  {
0155         compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
0156         device_type = "pci";
0157         reg = <0xee090000 0xc00>,
0158               <0xee080000 0x1100>;
0159         clocks = <&cpg CPG_MOD 703>;
0160         power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
0161         resets = <&cpg 703>;
0162         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
0163 
0164         bus-range = <0 0>;
0165         #address-cells = <3>;
0166         #size-cells = <2>;
0167         #interrupt-cells = <1>;
0168         ranges = <0x02000000 0 0xee080000 0xee080000 0 0x00010000>;
0169         dma-ranges = <0x42000000 0 0x40000000 0x40000000 0 0x40000000>;
0170         interrupt-map-mask = <0xf800 0 0 0x7>;
0171         interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
0172                         <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
0173                         <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
0174 
0175         usb@1,0 {
0176             reg = <0x800 0 0 0 0>;
0177             phys = <&usb0 0>;
0178             phy-names = "usb";
0179         };
0180 
0181         usb@2,0 {
0182             reg = <0x1000 0 0 0 0>;
0183             phys = <&usb0 0>;
0184             phy-names = "usb";
0185         };
0186     };