bindings/pci/rcar-pci-ep.yaml

0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 # Copyright (C) 2020 Renesas Electronics Europe GmbH - https://www.renesas.com/eu/en/
0003 %YAML 1.2
0004 ---
0005 $id: http://devicetree.org/schemas/pci/rcar-pci-ep.yaml#
0006 $schema: http://devicetree.org/meta-schemas/core.yaml#
0007
0008 title: Renesas R-Car PCIe Endpoint
0009
0010 maintainers:
0011   - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
0012   - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
0013
0014 properties:
0015   compatible:
0016     items:
0017       - enum:
0018           - renesas,r8a774a1-pcie-ep     # RZ/G2M
0019           - renesas,r8a774b1-pcie-ep     # RZ/G2N
0020           - renesas,r8a774c0-pcie-ep     # RZ/G2E
0021           - renesas,r8a774e1-pcie-ep     # RZ/G2H
0022           - renesas,r8a7795-pcie-ep      # R-Car H3
0023       - const: renesas,rcar-gen3-pcie-ep # R-Car Gen3 and RZ/G2
0024
0025   reg:
0026     maxItems: 5
0027
0028   reg-names:
0029     items:
0030       - const: apb-base
0031       - const: memory0
0032       - const: memory1
0033       - const: memory2
0034       - const: memory3
0035
0036   interrupts:
0037     minItems: 3
0038     maxItems: 3
0039
0040   power-domains:
0041     maxItems: 1
0042
0043   resets:
0044     maxItems: 1
0045
0046   clocks:
0047     maxItems: 1
0048
0049   clock-names:
0050     items:
0051       - const: pcie
0052
0053   max-functions:
0054     minimum: 1
0055     maximum: 1
0056
0057 required:
0058   - compatible
0059   - reg
0060   - reg-names
0061   - interrupts
0062   - resets
0063   - power-domains
0064   - clocks
0065   - clock-names
0066   - max-functions
0067
0068 additionalProperties: false
0069
0070 examples:
0071   - |
0072     #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
0073     #include <dt-bindings/interrupt-controller/arm-gic.h>
0074     #include <dt-bindings/power/r8a774c0-sysc.h>
0075
0076      pcie0_ep: pcie-ep@fe000000 {
0077             compatible = "renesas,r8a774c0-pcie-ep",
0078                          "renesas,rcar-gen3-pcie-ep";
0079             reg = <0xfe000000 0x80000>,
0080                   <0xfe100000 0x100000>,
0081                   <0xfe200000 0x200000>,
0082                   <0x30000000 0x8000000>,
0083                   <0x38000000 0x8000000>;
0084             reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
0085             interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
0086                          <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
0087                          <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
0088             resets = <&cpg 319>;
0089             power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
0090             clocks = <&cpg CPG_MOD 319>;
0091             clock-names = "pcie";
0092             max-functions = /bits/ 8 <1>;
0093     };