0001 * Mediatek/Ralink RT3883 PCI controller
0002
0003 1) Main node
0004
0005 Required properties:
0006
0007 - compatible: must be "ralink,rt3883-pci"
0008
0009 - reg: specifies the physical base address of the controller and
0010 the length of the memory mapped region.
0011
0012 - #address-cells: specifies the number of cells needed to encode an
0013 address. The value must be 1.
0014
0015 - #size-cells: specifies the number of cells used to represent the size
0016 of an address. The value must be 1.
0017
0018 - ranges: specifies the translation between child address space and parent
0019 address space
0020
0021 Optional properties:
0022
0023 - status: indicates the operational status of the device.
0024 Value must be either "disabled" or "okay".
0025
0026 2) Child nodes
0027
0028 The main node must have two child nodes which describes the built-in
0029 interrupt controller and the PCI host bridge.
0030
0031 a) Interrupt controller:
0032
0033 Required properties:
0034
0035 - interrupt-controller: identifies the node as an interrupt controller
0036
0037 - #address-cells: specifies the number of cells needed to encode an
0038 address. The value must be 0. As such, 'interrupt-map' nodes do not
0039 have to specify a parent unit address.
0040
0041 - #interrupt-cells: specifies the number of cells needed to encode an
0042 interrupt source. The value must be 1.
0043
0044 - interrupts: specifies the interrupt source of the parent interrupt
0045 controller. The format of the interrupt specifier depends on the
0046 parent interrupt controller.
0047
0048 b) PCI host bridge:
0049
0050 Required properties:
0051
0052 - #address-cells: specifies the number of cells needed to encode an
0053 address. The value must be 0.
0054
0055 - #size-cells: specifies the number of cells used to represent the size
0056 of an address. The value must be 2.
0057
0058 - #interrupt-cells: specifies the number of cells needed to encode an
0059 interrupt source. The value must be 1.
0060
0061 - device_type: must be "pci"
0062
0063 - bus-range: PCI bus numbers covered
0064
0065 - ranges: specifies the ranges for the PCI memory and I/O regions
0066
0067 - interrupt-map-mask,
0068 - interrupt-map: standard PCI properties to define the mapping of the
0069 PCI interface to interrupt numbers.
0070
0071 The PCI host bridge node might have additional sub-nodes representing
0072 the onboard PCI devices/PCI slots. Each such sub-node must have the
0073 following mandatory properties:
0074
0075 - reg: used only for interrupt mapping, so only the first four bytes
0076 are used to refer to the correct bus number and device number.
0077
0078 - device_type: must be "pci"
0079
0080 If a given sub-node represents a PCI bridge it must have following
0081 mandatory properties as well:
0082
0083 - #address-cells: must be set to <3>
0084
0085 - #size-cells: must set to <2>
0086
0087 - #interrupt-cells: must be set to <1>
0088
0089 - interrupt-map-mask,
0090 - interrupt-map: standard PCI properties to define the mapping of the
0091 PCI interface to interrupt numbers.
0092
0093 Besides the required properties the sub-nodes may have these optional
0094 properties:
0095
0096 - status: indicates the operational status of the sub-node.
0097 Value must be either "disabled" or "okay".
0098
0099 3) Example:
0100
0101 a) SoC specific dtsi file:
0102
0103 pci@10140000 {
0104 compatible = "ralink,rt3883-pci";
0105 reg = <0x10140000 0x20000>;
0106 #address-cells = <1>;
0107 #size-cells = <1>;
0108 ranges; /* direct mapping */
0109
0110 status = "disabled";
0111
0112 pciintc: interrupt-controller {
0113 interrupt-controller;
0114 #address-cells = <0>;
0115 #interrupt-cells = <1>;
0116
0117 interrupt-parent = <&cpuintc>;
0118 interrupts = <4>;
0119 };
0120
0121 host-bridge {
0122 #address-cells = <3>;
0123 #size-cells = <2>;
0124 #interrupt-cells = <1>;
0125
0126 device_type = "pci";
0127
0128 bus-range = <0 255>;
0129 ranges = <
0130 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
0131 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
0132 >;
0133
0134 interrupt-map-mask = <0xf800 0 0 7>;
0135 interrupt-map = <
0136 /* IDSEL 17 */
0137 0x8800 0 0 1 &pciintc 18
0138 0x8800 0 0 2 &pciintc 18
0139 0x8800 0 0 3 &pciintc 18
0140 0x8800 0 0 4 &pciintc 18
0141 /* IDSEL 18 */
0142 0x9000 0 0 1 &pciintc 19
0143 0x9000 0 0 2 &pciintc 19
0144 0x9000 0 0 3 &pciintc 19
0145 0x9000 0 0 4 &pciintc 19
0146 >;
0147
0148 pci-bridge@1 {
0149 reg = <0x0800 0 0 0 0>;
0150 device_type = "pci";
0151 #interrupt-cells = <1>;
0152 #address-cells = <3>;
0153 #size-cells = <2>;
0154
0155 interrupt-map-mask = <0x0 0 0 0>;
0156 interrupt-map = <0x0 0 0 0 &pciintc 20>;
0157
0158 status = "disabled";
0159 };
0160
0161 pci-slot@17 {
0162 reg = <0x8800 0 0 0 0>;
0163 device_type = "pci";
0164
0165 status = "disabled";
0166 };
0167
0168 pci-slot@18 {
0169 reg = <0x9000 0 0 0 0>;
0170 device_type = "pci";
0171
0172 status = "disabled";
0173 };
0174 };
0175 };
0176
0177 b) Board specific dts file:
0178
0179 pci@10140000 {
0180 status = "okay";
0181
0182 host-bridge {
0183 pci-bridge@1 {
0184 status = "okay";
0185 };
0186 };
0187 };
