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0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/pci/qcom,pcie.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Qualcomm PCI express root complex
0008 
0009 maintainers:
0010   - Bjorn Andersson <bjorn.andersson@linaro.org>
0011   - Stanimir Varbanov <svarbanov@mm-sol.com>
0012 
0013 description: |
0014   Qualcomm PCIe root complex controller is based on the Synopsys DesignWare
0015   PCIe IP.
0016 
0017 properties:
0018   compatible:
0019     enum:
0020       - qcom,pcie-ipq8064
0021       - qcom,pcie-ipq8064-v2
0022       - qcom,pcie-apq8064
0023       - qcom,pcie-apq8084
0024       - qcom,pcie-msm8996
0025       - qcom,pcie-ipq4019
0026       - qcom,pcie-ipq8074
0027       - qcom,pcie-qcs404
0028       - qcom,pcie-sc7280
0029       - qcom,pcie-sc8180x
0030       - qcom,pcie-sdm845
0031       - qcom,pcie-sm8150
0032       - qcom,pcie-sm8250
0033       - qcom,pcie-sm8450-pcie0
0034       - qcom,pcie-sm8450-pcie1
0035       - qcom,pcie-ipq6018
0036 
0037   reg:
0038     minItems: 4
0039     maxItems: 5
0040 
0041   reg-names:
0042     minItems: 4
0043     maxItems: 5
0044 
0045   interrupts:
0046     minItems: 1
0047     maxItems: 8
0048 
0049   interrupt-names:
0050     minItems: 1
0051     maxItems: 8
0052 
0053   # Common definitions for clocks, clock-names and reset.
0054   # Platform constraints are described later.
0055   clocks:
0056     minItems: 3
0057     maxItems: 12
0058 
0059   clock-names:
0060     minItems: 3
0061     maxItems: 12
0062 
0063   resets:
0064     minItems: 1
0065     maxItems: 12
0066 
0067   resets-names:
0068     minItems: 1
0069     maxItems: 12
0070 
0071   vdda-supply:
0072     description: A phandle to the core analog power supply
0073 
0074   vdda_phy-supply:
0075     description: A phandle to the core analog power supply for PHY
0076 
0077   vdda_refclk-supply:
0078     description: A phandle to the core analog power supply for IC which generates reference clock
0079 
0080   vddpe-3v3-supply:
0081     description: A phandle to the PCIe endpoint power supply
0082 
0083   phys:
0084     maxItems: 1
0085 
0086   phy-names:
0087     items:
0088       - const: pciephy
0089 
0090   power-domains:
0091     maxItems: 1
0092 
0093   perst-gpios:
0094     description: GPIO controlled connection to PERST# signal
0095     maxItems: 1
0096 
0097   wake-gpios:
0098     description: GPIO controlled connection to WAKE# signal
0099     maxItems: 1
0100 
0101 required:
0102   - compatible
0103   - reg
0104   - reg-names
0105   - interrupts
0106   - interrupt-names
0107   - "#interrupt-cells"
0108   - interrupt-map-mask
0109   - interrupt-map
0110   - clocks
0111   - clock-names
0112 
0113 allOf:
0114   - $ref: /schemas/pci/pci-bus.yaml#
0115   - if:
0116       properties:
0117         compatible:
0118           contains:
0119             enum:
0120               - qcom,pcie-apq8064
0121               - qcom,pcie-ipq4019
0122               - qcom,pcie-ipq8064
0123               - qcom,pcie-ipq8064v2
0124               - qcom,pcie-ipq8074
0125               - qcom,pcie-qcs404
0126     then:
0127       properties:
0128         reg:
0129           minItems: 4
0130           maxItems: 4
0131         reg-names:
0132           items:
0133             - const: dbi # DesignWare PCIe registers
0134             - const: elbi # External local bus interface registers
0135             - const: parf # Qualcomm specific registers
0136             - const: config # PCIe configuration space
0137 
0138   - if:
0139       properties:
0140         compatible:
0141           contains:
0142             enum:
0143               - qcom,pcie-ipq6018
0144     then:
0145       properties:
0146         reg:
0147           minItems: 5
0148           maxItems: 5
0149         reg-names:
0150           items:
0151             - const: dbi # DesignWare PCIe registers
0152             - const: elbi # External local bus interface registers
0153             - const: atu # ATU address space
0154             - const: parf # Qualcomm specific registers
0155             - const: config # PCIe configuration space
0156 
0157   - if:
0158       properties:
0159         compatible:
0160           contains:
0161             enum:
0162               - qcom,pcie-apq8084
0163               - qcom,pcie-msm8996
0164               - qcom,pcie-sdm845
0165     then:
0166       properties:
0167         reg:
0168           minItems: 4
0169           maxItems: 4
0170         reg-names:
0171           items:
0172             - const: parf # Qualcomm specific registers
0173             - const: dbi # DesignWare PCIe registers
0174             - const: elbi # External local bus interface registers
0175             - const: config # PCIe configuration space
0176 
0177   - if:
0178       properties:
0179         compatible:
0180           contains:
0181             enum:
0182               - qcom,pcie-sc7280
0183               - qcom,pcie-sc8180x
0184               - qcom,pcie-sm8250
0185               - qcom,pcie-sm8450-pcie0
0186               - qcom,pcie-sm8450-pcie1
0187     then:
0188       properties:
0189         reg:
0190           minItems: 5
0191           maxItems: 5
0192         reg-names:
0193           items:
0194             - const: parf # Qualcomm specific registers
0195             - const: dbi # DesignWare PCIe registers
0196             - const: elbi # External local bus interface registers
0197             - const: atu # ATU address space
0198             - const: config # PCIe configuration space
0199 
0200   - if:
0201       properties:
0202         compatible:
0203           contains:
0204             enum:
0205               - qcom,pcie-apq8064
0206               - qcom,pcie-ipq8064
0207               - qcom,pcie-ipq8064v2
0208     then:
0209       properties:
0210         clocks:
0211           minItems: 3
0212           maxItems: 5
0213         clock-names:
0214           minItems: 3
0215           items:
0216             - const: core # Clocks the pcie hw block
0217             - const: iface # Configuration AHB clock
0218             - const: phy # Clocks the pcie PHY block
0219             - const: aux # Clocks the pcie AUX block, not on apq8064
0220             - const: ref # Clocks the pcie ref block, not on apq8064
0221         resets:
0222           minItems: 5
0223           maxItems: 6
0224         reset-names:
0225           minItems: 5
0226           items:
0227             - const: axi # AXI reset
0228             - const: ahb # AHB reset
0229             - const: por # POR reset
0230             - const: pci # PCI reset
0231             - const: phy # PHY reset
0232             - const: ext # EXT reset, not on apq8064
0233       required:
0234         - vdda-supply
0235         - vdda_phy-supply
0236         - vdda_refclk-supply
0237 
0238   - if:
0239       properties:
0240         compatible:
0241           contains:
0242             enum:
0243               - qcom,pcie-apq8084
0244     then:
0245       properties:
0246         clocks:
0247           minItems: 4
0248           maxItems: 4
0249         clock-names:
0250           items:
0251             - const: iface # Configuration AHB clock
0252             - const: master_bus # Master AXI clock
0253             - const: slave_bus # Slave AXI clock
0254             - const: aux # Auxiliary (AUX) clock
0255         resets:
0256           maxItems: 1
0257         reset-names:
0258           items:
0259             - const: core # Core reset
0260 
0261   - if:
0262       properties:
0263         compatible:
0264           contains:
0265             enum:
0266               - qcom,pcie-ipq4019
0267     then:
0268       properties:
0269         clocks:
0270           minItems: 3
0271           maxItems: 3
0272         clock-names:
0273           items:
0274             - const: aux # Auxiliary (AUX) clock
0275             - const: master_bus # Master AXI clock
0276             - const: slave_bus # Slave AXI clock
0277         resets:
0278           minItems: 12
0279           maxItems: 12
0280         reset-names:
0281           items:
0282             - const: axi_m # AXI master reset
0283             - const: axi_s # AXI slave reset
0284             - const: pipe # PIPE reset
0285             - const: axi_m_vmid # VMID reset
0286             - const: axi_s_xpu # XPU reset
0287             - const: parf # PARF reset
0288             - const: phy # PHY reset
0289             - const: axi_m_sticky # AXI sticky reset
0290             - const: pipe_sticky # PIPE sticky reset
0291             - const: pwr # PWR reset
0292             - const: ahb # AHB reset
0293             - const: phy_ahb # PHY AHB reset
0294 
0295   - if:
0296       properties:
0297         compatible:
0298           contains:
0299             enum:
0300               - qcom,pcie-msm8996
0301     then:
0302       oneOf:
0303         - properties:
0304             clock-names:
0305               items:
0306                 - const: pipe # Pipe Clock driving internal logic
0307                 - const: aux # Auxiliary (AUX) clock
0308                 - const: cfg # Configuration clock
0309                 - const: bus_master # Master AXI clock
0310                 - const: bus_slave # Slave AXI clock
0311         - properties:
0312             clock-names:
0313               items:
0314                 - const: pipe # Pipe Clock driving internal logic
0315                 - const: bus_master # Master AXI clock
0316                 - const: bus_slave # Slave AXI clock
0317                 - const: cfg # Configuration clock
0318                 - const: aux # Auxiliary (AUX) clock
0319       properties:
0320         clocks:
0321           minItems: 5
0322           maxItems: 5
0323         resets: false
0324         reset-names: false
0325 
0326   - if:
0327       properties:
0328         compatible:
0329           contains:
0330             enum:
0331               - qcom,pcie-ipq8074
0332     then:
0333       properties:
0334         clocks:
0335           minItems: 5
0336           maxItems: 5
0337         clock-names:
0338           items:
0339             - const: iface # PCIe to SysNOC BIU clock
0340             - const: axi_m # AXI Master clock
0341             - const: axi_s # AXI Slave clock
0342             - const: ahb # AHB clock
0343             - const: aux # Auxiliary clock
0344         resets:
0345           minItems: 7
0346           maxItems: 7
0347         reset-names:
0348           items:
0349             - const: pipe # PIPE reset
0350             - const: sleep # Sleep reset
0351             - const: sticky # Core Sticky reset
0352             - const: axi_m # AXI Master reset
0353             - const: axi_s # AXI Slave reset
0354             - const: ahb # AHB Reset
0355             - const: axi_m_sticky # AXI Master Sticky reset
0356 
0357   - if:
0358       properties:
0359         compatible:
0360           contains:
0361             enum:
0362               - qcom,pcie-ipq6018
0363     then:
0364       properties:
0365         clocks:
0366           minItems: 5
0367           maxItems: 5
0368         clock-names:
0369           items:
0370             - const: iface # PCIe to SysNOC BIU clock
0371             - const: axi_m # AXI Master clock
0372             - const: axi_s # AXI Slave clock
0373             - const: axi_bridge # AXI bridge clock
0374             - const: rchng
0375         resets:
0376           minItems: 8
0377           maxItems: 8
0378         reset-names:
0379           items:
0380             - const: pipe # PIPE reset
0381             - const: sleep # Sleep reset
0382             - const: sticky # Core Sticky reset
0383             - const: axi_m # AXI Master reset
0384             - const: axi_s # AXI Slave reset
0385             - const: ahb # AHB Reset
0386             - const: axi_m_sticky # AXI Master Sticky reset
0387             - const: axi_s_sticky # AXI Slave Sticky reset
0388 
0389   - if:
0390       properties:
0391         compatible:
0392           contains:
0393             enum:
0394               - qcom,pcie-qcs404
0395     then:
0396       properties:
0397         clocks:
0398           minItems: 4
0399           maxItems: 4
0400         clock-names:
0401           items:
0402             - const: iface # AHB clock
0403             - const: aux # Auxiliary clock
0404             - const: master_bus # AXI Master clock
0405             - const: slave_bus # AXI Slave clock
0406         resets:
0407           minItems: 6
0408           maxItems: 6
0409         reset-names:
0410           items:
0411             - const: axi_m # AXI Master reset
0412             - const: axi_s # AXI Slave reset
0413             - const: axi_m_sticky # AXI Master Sticky reset
0414             - const: pipe_sticky # PIPE sticky reset
0415             - const: pwr # PWR reset
0416             - const: ahb # AHB reset
0417 
0418   - if:
0419       properties:
0420         compatible:
0421           contains:
0422             enum:
0423               - qcom,pcie-sc7280
0424     then:
0425       properties:
0426         clocks:
0427           minItems: 11
0428           maxItems: 11
0429         clock-names:
0430           items:
0431             - const: pipe # PIPE clock
0432             - const: pipe_mux # PIPE MUX
0433             - const: phy_pipe # PIPE output clock
0434             - const: ref # REFERENCE clock
0435             - const: aux # Auxiliary clock
0436             - const: cfg # Configuration clock
0437             - const: bus_master # Master AXI clock
0438             - const: bus_slave # Slave AXI clock
0439             - const: slave_q2a # Slave Q2A clock
0440             - const: tbu # PCIe TBU clock
0441             - const: ddrss_sf_tbu # PCIe SF TBU clock
0442         resets:
0443           maxItems: 1
0444         reset-names:
0445           items:
0446             - const: pci # PCIe core reset
0447 
0448   - if:
0449       properties:
0450         compatible:
0451           contains:
0452             enum:
0453               - qcom,pcie-sdm845
0454     then:
0455       oneOf:
0456           # Unfortunately the "optional" ref clock is used in the middle of the list
0457         - properties:
0458             clocks:
0459               minItems: 8
0460               maxItems: 8
0461             clock-names:
0462               items:
0463                 - const: pipe # PIPE clock
0464                 - const: aux # Auxiliary clock
0465                 - const: cfg # Configuration clock
0466                 - const: bus_master # Master AXI clock
0467                 - const: bus_slave # Slave AXI clock
0468                 - const: slave_q2a # Slave Q2A clock
0469                 - const: ref # REFERENCE clock
0470                 - const: tbu # PCIe TBU clock
0471         - properties:
0472             clocks:
0473               minItems: 7
0474               maxItems: 7
0475             clock-names:
0476               items:
0477                 - const: pipe # PIPE clock
0478                 - const: aux # Auxiliary clock
0479                 - const: cfg # Configuration clock
0480                 - const: bus_master # Master AXI clock
0481                 - const: bus_slave # Slave AXI clock
0482                 - const: slave_q2a # Slave Q2A clock
0483                 - const: tbu # PCIe TBU clock
0484       properties:
0485         resets:
0486           maxItems: 1
0487         reset-names:
0488           items:
0489             - const: pci # PCIe core reset
0490 
0491   - if:
0492       properties:
0493         compatible:
0494           contains:
0495             enum:
0496               - qcom,pcie-sc8180x
0497               - qcom,pcie-sm8150
0498               - qcom,pcie-sm8250
0499     then:
0500       oneOf:
0501           # Unfortunately the "optional" ref clock is used in the middle of the list
0502         - properties:
0503             clocks:
0504               minItems: 9
0505               maxItems: 9
0506             clock-names:
0507               items:
0508                 - const: pipe # PIPE clock
0509                 - const: aux # Auxiliary clock
0510                 - const: cfg # Configuration clock
0511                 - const: bus_master # Master AXI clock
0512                 - const: bus_slave # Slave AXI clock
0513                 - const: slave_q2a # Slave Q2A clock
0514                 - const: ref # REFERENCE clock
0515                 - const: tbu # PCIe TBU clock
0516                 - const: ddrss_sf_tbu # PCIe SF TBU clock
0517         - properties:
0518             clocks:
0519               minItems: 8
0520               maxItems: 8
0521             clock-names:
0522               items:
0523                 - const: pipe # PIPE clock
0524                 - const: aux # Auxiliary clock
0525                 - const: cfg # Configuration clock
0526                 - const: bus_master # Master AXI clock
0527                 - const: bus_slave # Slave AXI clock
0528                 - const: slave_q2a # Slave Q2A clock
0529                 - const: tbu # PCIe TBU clock
0530                 - const: ddrss_sf_tbu # PCIe SF TBU clock
0531       properties:
0532         resets:
0533           maxItems: 1
0534         reset-names:
0535           items:
0536             - const: pci # PCIe core reset
0537 
0538   - if:
0539       properties:
0540         compatible:
0541           contains:
0542             enum:
0543               - qcom,pcie-sm8450-pcie0
0544     then:
0545       properties:
0546         clocks:
0547           minItems: 12
0548           maxItems: 12
0549         clock-names:
0550           items:
0551             - const: pipe # PIPE clock
0552             - const: pipe_mux # PIPE MUX
0553             - const: phy_pipe # PIPE output clock
0554             - const: ref # REFERENCE clock
0555             - const: aux # Auxiliary clock
0556             - const: cfg # Configuration clock
0557             - const: bus_master # Master AXI clock
0558             - const: bus_slave # Slave AXI clock
0559             - const: slave_q2a # Slave Q2A clock
0560             - const: ddrss_sf_tbu # PCIe SF TBU clock
0561             - const: aggre0 # Aggre NoC PCIe0 AXI clock
0562             - const: aggre1 # Aggre NoC PCIe1 AXI clock
0563         resets:
0564           maxItems: 1
0565         reset-names:
0566           items:
0567             - const: pci # PCIe core reset
0568 
0569   - if:
0570       properties:
0571         compatible:
0572           contains:
0573             enum:
0574               - qcom,pcie-sm8450-pcie1
0575     then:
0576       properties:
0577         clocks:
0578           minItems: 11
0579           maxItems: 11
0580         clock-names:
0581           items:
0582             - const: pipe # PIPE clock
0583             - const: pipe_mux # PIPE MUX
0584             - const: phy_pipe # PIPE output clock
0585             - const: ref # REFERENCE clock
0586             - const: aux # Auxiliary clock
0587             - const: cfg # Configuration clock
0588             - const: bus_master # Master AXI clock
0589             - const: bus_slave # Slave AXI clock
0590             - const: slave_q2a # Slave Q2A clock
0591             - const: ddrss_sf_tbu # PCIe SF TBU clock
0592             - const: aggre1 # Aggre NoC PCIe1 AXI clock
0593         resets:
0594           maxItems: 1
0595         reset-names:
0596           items:
0597             - const: pci # PCIe core reset
0598 
0599   - if:
0600       not:
0601         properties:
0602           compatible:
0603             contains:
0604               enum:
0605                 - qcom,pcie-apq8064
0606                 - qcom,pcie-ipq4019
0607                 - qcom,pcie-ipq8064
0608                 - qcom,pcie-ipq8064v2
0609                 - qcom,pcie-ipq8074
0610                 - qcom,pcie-qcs404
0611     then:
0612       required:
0613         - power-domains
0614 
0615   - if:
0616       not:
0617         properties:
0618           compatible:
0619             contains:
0620               enum:
0621                 - qcom,pcie-msm8996
0622     then:
0623       required:
0624         - resets
0625         - reset-names
0626 
0627     # Newer chipsets support either 1 or 8 MSI vectors
0628     # On older chipsets it's always 1 MSI vector
0629   - if:
0630       properties:
0631         compatible:
0632           contains:
0633             enum:
0634               - qcom,pcie-msm8996
0635               - qcom,pcie-sc7280
0636               - qcom,pcie-sc8180x
0637               - qcom,pcie-sdm845
0638               - qcom,pcie-sm8150
0639               - qcom,pcie-sm8250
0640               - qcom,pcie-sm8450-pcie0
0641               - qcom,pcie-sm8450-pcie1
0642     then:
0643       oneOf:
0644         - properties:
0645             interrupts:
0646               maxItems: 1
0647             interrupt-names:
0648               items:
0649                 - const: msi
0650         - properties:
0651             interrupts:
0652               minItems: 8
0653             interrupt-names:
0654               items:
0655                 - const: msi0
0656                 - const: msi1
0657                 - const: msi2
0658                 - const: msi3
0659                 - const: msi4
0660                 - const: msi5
0661                 - const: msi6
0662                 - const: msi7
0663     else:
0664       properties:
0665         interrupts:
0666           maxItems: 1
0667         interrupt-names:
0668           items:
0669             - const: msi
0670 
0671 unevaluatedProperties: false
0672 
0673 examples:
0674   - |
0675     #include <dt-bindings/interrupt-controller/arm-gic.h>
0676     pcie@1b500000 {
0677       compatible = "qcom,pcie-ipq8064";
0678       reg = <0x1b500000 0x1000>,
0679             <0x1b502000 0x80>,
0680             <0x1b600000 0x100>,
0681             <0x0ff00000 0x100000>;
0682       reg-names = "dbi", "elbi", "parf", "config";
0683       device_type = "pci";
0684       linux,pci-domain = <0>;
0685       bus-range = <0x00 0xff>;
0686       num-lanes = <1>;
0687       #address-cells = <3>;
0688       #size-cells = <2>;
0689       ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>,
0690                <0x82000000 0 0 0x08000000 0 0x07e00000>;
0691       interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
0692       interrupt-names = "msi";
0693       #interrupt-cells = <1>;
0694       interrupt-map-mask = <0 0 0 0x7>;
0695       interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>,
0696                       <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>,
0697                       <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>,
0698                       <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>;
0699       clocks = <&gcc 41>,
0700                <&gcc 43>,
0701                <&gcc 44>,
0702                <&gcc 42>,
0703                <&gcc 248>;
0704       clock-names = "core", "iface", "phy", "aux", "ref";
0705       resets = <&gcc 27>,
0706                <&gcc 26>,
0707                <&gcc 25>,
0708                <&gcc 24>,
0709                <&gcc 23>,
0710                <&gcc 22>;
0711       reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
0712       pinctrl-0 = <&pcie_pins_default>;
0713       pinctrl-names = "default";
0714       vdda-supply = <&pm8921_s3>;
0715       vdda_phy-supply = <&pm8921_lvs6>;
0716       vdda_refclk-supply = <&ext_3p3v>;
0717     };
0718   - |
0719     #include <dt-bindings/interrupt-controller/arm-gic.h>
0720     #include <dt-bindings/gpio/gpio.h>
0721     pcie@fc520000 {
0722       compatible = "qcom,pcie-apq8084";
0723       reg = <0xfc520000 0x2000>,
0724             <0xff000000 0x1000>,
0725             <0xff001000 0x1000>,
0726             <0xff002000 0x2000>;
0727       reg-names = "parf", "dbi", "elbi", "config";
0728       device_type = "pci";
0729       linux,pci-domain = <0>;
0730       bus-range = <0x00 0xff>;
0731       num-lanes = <1>;
0732       #address-cells = <3>;
0733       #size-cells = <2>;
0734       ranges = <0x81000000 0 0          0xff200000 0 0x00100000>,
0735                <0x82000000 0 0x00300000 0xff300000 0 0x00d00000>;
0736       interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
0737       interrupt-names = "msi";
0738       #interrupt-cells = <1>;
0739       interrupt-map-mask = <0 0 0 0x7>;
0740       interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>,
0741                       <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>,
0742                       <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>,
0743                       <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>;
0744       clocks = <&gcc 324>,
0745                <&gcc 325>,
0746                <&gcc 327>,
0747                <&gcc 323>;
0748       clock-names = "iface", "master_bus", "slave_bus", "aux";
0749       resets = <&gcc 81>;
0750       reset-names = "core";
0751       power-domains = <&gcc 1>;
0752       vdda-supply = <&pma8084_l3>;
0753       phys = <&pciephy0>;
0754       phy-names = "pciephy";
0755       perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>;
0756       pinctrl-0 = <&pcie0_pins_default>;
0757       pinctrl-names = "default";
0758     };
0759 ...