0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Brcmstb PCIe Host Controller Device Tree Bindings
0008
0009 maintainers:
0010 - Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
0011
0012 properties:
0013 compatible:
0014 items:
0015 - enum:
0016 - brcm,bcm2711-pcie # The Raspberry Pi 4
0017 - brcm,bcm4908-pcie
0018 - brcm,bcm7211-pcie # Broadcom STB version of RPi4
0019 - brcm,bcm7278-pcie # Broadcom 7278 Arm
0020 - brcm,bcm7216-pcie # Broadcom 7216 Arm
0021 - brcm,bcm7445-pcie # Broadcom 7445 Arm
0022 - brcm,bcm7425-pcie # Broadcom 7425 MIPs
0023 - brcm,bcm7435-pcie # Broadcom 7435 MIPs
0024
0025 reg:
0026 maxItems: 1
0027
0028 interrupts:
0029 minItems: 1
0030 items:
0031 - description: PCIe host controller
0032 - description: builtin MSI controller
0033
0034 interrupt-names:
0035 minItems: 1
0036 items:
0037 - const: pcie
0038 - const: msi
0039
0040 ranges:
0041 minItems: 1
0042 maxItems: 4
0043
0044 dma-ranges:
0045 minItems: 1
0046 maxItems: 6
0047
0048 clocks:
0049 maxItems: 1
0050
0051 clock-names:
0052 items:
0053 - const: sw_pcie
0054
0055 msi-controller:
0056 description: Identifies the node as an MSI controller.
0057
0058 msi-parent:
0059 description: MSI controller the device is capable of using.
0060
0061 brcm,enable-ssc:
0062 description: Indicates usage of spread-spectrum clocking.
0063 type: boolean
0064
0065 aspm-no-l0s: true
0066
0067 brcm,scb-sizes:
0068 description: u64 giving the 64bit PCIe memory
0069 viewport size of a memory controller. There may be up to
0070 three controllers, and each size must be a power of two
0071 with a size greater or equal to the amount of memory the
0072 controller supports. Note that each memory controller
0073 may have two component regions -- base and extended -- so
0074 this information cannot be deduced from the dma-ranges.
0075 $ref: /schemas/types.yaml#/definitions/uint64-array
0076 items:
0077 minItems: 1
0078 maxItems: 3
0079
0080 required:
0081 - compatible
0082 - reg
0083 - ranges
0084 - dma-ranges
0085 - "#interrupt-cells"
0086 - interrupts
0087 - interrupt-names
0088 - interrupt-map-mask
0089 - interrupt-map
0090 - msi-controller
0091
0092 allOf:
0093 - $ref: /schemas/pci/pci-bus.yaml#
0094 - $ref: /schemas/interrupt-controller/msi-controller.yaml#
0095 - if:
0096 properties:
0097 compatible:
0098 contains:
0099 const: brcm,bcm4908-pcie
0100 then:
0101 properties:
0102 resets:
0103 items:
0104 - description: reset controller handling the PERST# signal
0105
0106 reset-names:
0107 items:
0108 - const: perst
0109
0110 required:
0111 - resets
0112 - reset-names
0113 - if:
0114 properties:
0115 compatible:
0116 contains:
0117 const: brcm,bcm7216-pcie
0118 then:
0119 properties:
0120 resets:
0121 items:
0122 - description: phandle pointing to the RESCAL reset controller
0123
0124 reset-names:
0125 items:
0126 - const: rescal
0127
0128 required:
0129 - resets
0130 - reset-names
0131
0132 unevaluatedProperties: false
0133
0134 examples:
0135 - |
0136 #include <dt-bindings/interrupt-controller/irq.h>
0137 #include <dt-bindings/interrupt-controller/arm-gic.h>
0138
0139 scb {
0140 #address-cells = <2>;
0141 #size-cells = <1>;
0142 pcie0: pcie@7d500000 {
0143 compatible = "brcm,bcm2711-pcie";
0144 reg = <0x0 0x7d500000 0x9310>;
0145 device_type = "pci";
0146 #address-cells = <3>;
0147 #size-cells = <2>;
0148 #interrupt-cells = <1>;
0149 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
0150 <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
0151 interrupt-names = "pcie", "msi";
0152 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
0153 interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH
0154 0 0 0 2 &gicv2 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH
0155 0 0 0 3 &gicv2 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH
0156 0 0 0 4 &gicv2 GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
0157
0158 msi-parent = <&pcie0>;
0159 msi-controller;
0160 ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>;
0161 dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>,
0162 <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>;
0163 brcm,enable-ssc;
0164 brcm,scb-sizes = <0x0000000080000000 0x0000000080000000>;
0165
0166 /* PCIe bridge, Root Port */
0167 pci@0,0 {
0168 #address-cells = <3>;
0169 #size-cells = <2>;
0170 reg = <0x0 0x0 0x0 0x0 0x0>;
0171 compatible = "pciclass,0604";
0172 device_type = "pci";
0173 vpcie3v3-supply = <&vreg7>;
0174 ranges;
0175
0176 /* PCIe endpoint */
0177 pci-ep@0,0 {
0178 assigned-addresses =
0179 <0x82010000 0x0 0xf8000000 0x6 0x00000000 0x0 0x2000>;
0180 reg = <0x0 0x0 0x0 0x0 0x0>;
0181 compatible = "pci14e4,1688";
0182 };
0183 };
0184 };
0185 };
