0001 * Freescale 83xx and 512x PCI bridges
0002
0003 Freescale 83xx and 512x SOCs include the same PCI bridge core.
0004
0005 83xx/512x specific notes:
0006 - reg: should contain two address length tuples
0007 The first is for the internal PCI bridge registers
0008 The second is for the PCI config space access registers
0009
0010 Example (MPC8313ERDB)
0011 pci0: pci@e0008500 {
0012 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0013 interrupt-map = <
0014 /* IDSEL 0x0E -mini PCI */
0015 0x7000 0x0 0x0 0x1 &ipic 18 0x8
0016 0x7000 0x0 0x0 0x2 &ipic 18 0x8
0017 0x7000 0x0 0x0 0x3 &ipic 18 0x8
0018 0x7000 0x0 0x0 0x4 &ipic 18 0x8
0019
0020 /* IDSEL 0x0F - PCI slot */
0021 0x7800 0x0 0x0 0x1 &ipic 17 0x8
0022 0x7800 0x0 0x0 0x2 &ipic 18 0x8
0023 0x7800 0x0 0x0 0x3 &ipic 17 0x8
0024 0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
0025 interrupt-parent = <&ipic>;
0026 interrupts = <66 0x8>;
0027 bus-range = <0x0 0x0>;
0028 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0029 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0030 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
0031 clock-frequency = <66666666>;
0032 #interrupt-cells = <1>;
0033 #size-cells = <2>;
0034 #address-cells = <3>;
0035 reg = <0xe0008500 0x100 /* internal registers */
0036 0xe0008300 0x8>; /* config space access registers */
0037 compatible = "fsl,mpc8349-pci";
0038 device_type = "pci";
0039 };
