0001 OpenRISC Generic SoC
0002 ====================
0003
0004 Boards and FPGA SoC's which support the OpenRISC standard platform. The
0005 platform essentially follows the conventions of the OpenRISC architecture
0006 specification, however some aspects, such as the boot protocol have been defined
0007 by the Linux port.
0008
0009 Required properties
0010 -------------------
0011 - compatible: Must include "opencores,or1ksim"
0012
0013 CPU nodes:
0014 ----------
0015 A "cpus" node is required. Required properties:
0016 - #address-cells: Must be 1.
0017 - #size-cells: Must be 0.
0018 A CPU sub-node is also required for at least CPU 0. Since the topology may
0019 be probed via CPS, it is not necessary to specify secondary CPUs. Required
0020 properties:
0021 - compatible: Must be "opencores,or1200-rtlsvn481".
0022 - reg: CPU number.
0023 - clock-frequency: The CPU clock frequency in Hz.
0024 Example:
0025 cpus {
0026 #address-cells = <1>;
0027 #size-cells = <0>;
0028 cpu@0 {
0029 compatible = "opencores,or1200-rtlsvn481";
0030 reg = <0>;
0031 clock-frequency = <20000000>;
0032 };
0033 };
0034
0035
0036 Boot protocol
0037 -------------
0038 The bootloader may pass the following arguments to the kernel:
0039 - r3: address of a flattened device-tree blob or 0x0.
