bindings/nvmem/qcom%2Cqfprom.yaml

0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/nvmem/qcom,qfprom.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Qualcomm Technologies Inc, QFPROM Efuse bindings
0008
0009 maintainers:
0010   - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
0011
0012 allOf:
0013   - $ref: "nvmem.yaml#"
0014
0015 properties:
0016   compatible:
0017     items:
0018       - enum:
0019           - qcom,apq8064-qfprom
0020           - qcom,apq8084-qfprom
0021           - qcom,msm8974-qfprom
0022           - qcom,msm8916-qfprom
0023           - qcom,msm8996-qfprom
0024           - qcom,msm8998-qfprom
0025           - qcom,qcs404-qfprom
0026           - qcom,sc7180-qfprom
0027           - qcom,sc7280-qfprom
0028           - qcom,sdm845-qfprom
0029       - const: qcom,qfprom
0030
0031   reg:
0032     # If the QFPROM is read-only OS image then only the corrected region
0033     # needs to be provided.  If the QFPROM is writable then all 4 regions
0034     # must be provided.
0035     oneOf:
0036       - items:
0037           - description: The corrected region.
0038       - items:
0039           - description: The corrected region.
0040           - description: The raw region.
0041           - description: The config region.
0042           - description: The security control region.
0043
0044   # Clock must be provided if QFPROM is writable from the OS image.
0045   clocks:
0046     maxItems: 1
0047   clock-names:
0048     const: core
0049
0050   # Supply reference must be provided if QFPROM is writable from the OS image.
0051   vcc-supply:
0052     description: Our power supply.
0053
0054   power-domains:
0055     maxItems: 1
0056
0057   # Needed if any child nodes are present.
0058   "#address-cells":
0059     const: 1
0060   "#size-cells":
0061     const: 1
0062
0063 required:
0064   - compatible
0065   - reg
0066
0067 unevaluatedProperties: false
0068
0069 examples:
0070   - |
0071     #include <dt-bindings/clock/qcom,gcc-sc7180.h>
0072
0073     soc {
0074       #address-cells = <2>;
0075       #size-cells = <2>;
0076
0077       efuse@784000 {
0078         compatible = "qcom,sc7180-qfprom", "qcom,qfprom";
0079         reg = <0 0x00784000 0 0x8ff>,
0080               <0 0x00780000 0 0x7a0>,
0081               <0 0x00782000 0 0x100>,
0082               <0 0x00786000 0 0x1fff>;
0083         clocks = <&gcc GCC_SEC_CTRL_CLK_SRC>;
0084         clock-names = "core";
0085         #address-cells = <1>;
0086         #size-cells = <1>;
0087
0088         vcc-supply = <&vreg_l11a_1p8>;
0089
0090         hstx-trim-primary@25b {
0091           reg = <0x25b 0x1>;
0092           bits = <1 3>;
0093         };
0094       };
0095     };
0096
0097   - |
0098     soc {
0099       #address-cells = <2>;
0100       #size-cells = <2>;
0101
0102       efuse@784000 {
0103         compatible = "qcom,sdm845-qfprom", "qcom,qfprom";
0104         reg = <0 0x00784000 0 0x8ff>;
0105         #address-cells = <1>;
0106         #size-cells = <1>;
0107
0108         hstx-trim-primary@1eb {
0109           reg = <0x1eb 0x1>;
0110           bits = <1 4>;
0111         };
0112       };
0113     };