0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/nvmem/nvmem.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: NVMEM (Non Volatile Memory) Device Tree Bindings
0008
0009 maintainers:
0010 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
0011
0012 description: |
0013 This binding is intended to represent the location of hardware
0014 configuration data stored in NVMEMs like eeprom, efuses and so on.
0015
0016 On a significant proportion of boards, the manufacturer has stored
0017 some data on NVMEM, for the OS to be able to retrieve these
0018 information and act upon it. Obviously, the OS has to know about
0019 where to retrieve these data from, and where they are stored on the
0020 storage device.
0021
0022 properties:
0023 "#address-cells":
0024 const: 1
0025
0026 "#size-cells":
0027 const: 1
0028
0029 read-only:
0030 $ref: /schemas/types.yaml#/definitions/flag
0031 description:
0032 Mark the provider as read only.
0033
0034 wp-gpios:
0035 description:
0036 GPIO to which the write-protect pin of the chip is connected.
0037 The write-protect GPIO is asserted, when it's driven high
0038 (logical '1') to block the write operation. It's deasserted,
0039 when it's driven low (logical '0') to allow writing.
0040 maxItems: 1
0041
0042 patternProperties:
0043 "@[0-9a-f]+(,[0-7])?$":
0044 type: object
0045
0046 properties:
0047 reg:
0048 maxItems: 1
0049 description:
0050 Offset and size in bytes within the storage device.
0051
0052 bits:
0053 $ref: /schemas/types.yaml#/definitions/uint32-array
0054 items:
0055 - minimum: 0
0056 maximum: 7
0057 description:
0058 Offset in bit within the address range specified by reg.
0059 - minimum: 1
0060 description:
0061 Size in bit within the address range specified by reg.
0062
0063 additionalProperties: true
0064
0065 examples:
0066 - |
0067 #include <dt-bindings/gpio/gpio.h>
0068
0069 qfprom: eeprom@700000 {
0070 #address-cells = <1>;
0071 #size-cells = <1>;
0072 reg = <0x00700000 0x100000>;
0073
0074 wp-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
0075
0076 /* ... */
0077
0078 /* Data cells */
0079 tsens_calibration: calib@404 {
0080 reg = <0x404 0x10>;
0081 };
0082
0083 tsens_calibration_bckp: calib_bckp@504 {
0084 reg = <0x504 0x11>;
0085 bits = <6 128>;
0086 };
0087
0088 pvs_version: pvs-version@6 {
0089 reg = <0x6 0x2>;
0090 bits = <7 2>;
0091 };
0092
0093 speed_bin: speed-bin@c{
0094 reg = <0xc 0x1>;
0095 bits = <2 3>;
0096 };
0097 };
0098
0099 ...
