0001 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/net/nfc/marvell,nci.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Marvell International Ltd. NCI NFC controller
0008
0009 maintainers:
0010 - Krzysztof Kozlowski <krzk@kernel.org>
0011
0012 properties:
0013 compatible:
0014 enum:
0015 - marvell,nfc-i2c
0016 - marvell,nfc-spi
0017 - marvell,nfc-uart
0018
0019 hci-muxed:
0020 type: boolean
0021 description: |
0022 Specifies that the chip is muxing NCI over HCI frames
0023
0024 interrupts:
0025 maxItems: 1
0026
0027 reg:
0028 maxItems: 1
0029
0030 reset-n-io:
0031 $ref: "/schemas/types.yaml#/definitions/phandle-array"
0032 maxItems: 1
0033 description: |
0034 Output GPIO pin used to reset the chip (active low)
0035
0036 i2c-int-falling:
0037 type: boolean
0038 description: |
0039 For I2C type of connection. Specifies that the chip read event shall be
0040 trigged on falling edge.
0041
0042 i2c-int-rising:
0043 type: boolean
0044 description: |
0045 For I2C type of connection. Specifies that the chip read event shall be
0046 trigged on rising edge.
0047
0048 break-control:
0049 type: boolean
0050 description: |
0051 For UART type of connection. Specifies that the chip needs specific break
0052 management.
0053
0054 flow-control:
0055 type: boolean
0056 description: |
0057 For UART type of connection. Specifies that the chip is using RTS/CTS.
0058
0059 spi-cpha: true
0060 spi-cpol: true
0061
0062 required:
0063 - compatible
0064
0065 allOf:
0066 - if:
0067 properties:
0068 compatible:
0069 contains:
0070 const: marvell,nfc-i2c
0071 then:
0072 properties:
0073 break-control: false
0074 flow-control: false
0075 spi-cpha: false
0076 spi-cpol: false
0077 spi-max-frequency: false
0078 required:
0079 - reg
0080
0081 - if:
0082 properties:
0083 compatible:
0084 contains:
0085 const: marvell,nfc-spi
0086 then:
0087 $ref: /schemas/spi/spi-peripheral-props.yaml#
0088 properties:
0089 break-control: false
0090 flow-control: false
0091 i2c-int-falling: false
0092 i2c-int-rising: false
0093 required:
0094 - reg
0095
0096 - if:
0097 properties:
0098 compatible:
0099 contains:
0100 const: marvell,nfc-uart
0101 then:
0102 properties:
0103 i2c-int-falling: false
0104 i2c-int-rising: false
0105 interrupts: false
0106 spi-cpha: false
0107 spi-cpol: false
0108 spi-max-frequency: false
0109 reg: false
0110
0111 unevaluatedProperties: false
0112
0113 examples:
0114 - |
0115 #include <dt-bindings/gpio/gpio.h>
0116 #include <dt-bindings/interrupt-controller/irq.h>
0117
0118 i2c {
0119 #address-cells = <1>;
0120 #size-cells = <0>;
0121
0122 nfc@8 {
0123 compatible = "marvell,nfc-i2c";
0124 reg = <0x8>;
0125
0126 interrupt-parent = <&gpio3>;
0127 interrupts = <21 IRQ_TYPE_EDGE_RISING>;
0128
0129 i2c-int-rising;
0130
0131 reset-n-io = <&gpio3 19 GPIO_ACTIVE_HIGH>;
0132 };
0133 };
0134
0135 - |
0136 #include <dt-bindings/gpio/gpio.h>
0137 #include <dt-bindings/interrupt-controller/irq.h>
0138
0139 spi {
0140 #address-cells = <1>;
0141 #size-cells = <0>;
0142
0143 nfc@0 {
0144 compatible = "marvell,nfc-spi";
0145 reg = <0>;
0146
0147 spi-max-frequency = <3000000>;
0148 spi-cpha;
0149 spi-cpol;
0150
0151 interrupt-parent = <&gpio1>;
0152 interrupts = <17 IRQ_TYPE_EDGE_RISING>;
0153
0154 reset-n-io = <&gpio3 19 GPIO_ACTIVE_HIGH>;
0155 };
0156 };
0157
0158 - |
0159 #include <dt-bindings/gpio/gpio.h>
0160
0161 uart {
0162 nfc {
0163 compatible = "marvell,nfc-uart";
0164
0165 reset-n-io = <&gpio3 16 GPIO_ACTIVE_HIGH>;
0166
0167 hci-muxed;
0168 flow-control;
0169 };
0170 };
