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0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/mtd/rockchip,nand-controller.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Rockchip SoCs NAND FLASH Controller (NFC)
0008 
0009 allOf:
0010   - $ref: "nand-controller.yaml#"
0011 
0012 maintainers:
0013   - Heiko Stuebner <heiko@sntech.de>
0014 
0015 properties:
0016   compatible:
0017     oneOf:
0018       - const: rockchip,px30-nfc
0019       - const: rockchip,rk2928-nfc
0020       - const: rockchip,rv1108-nfc
0021       - items:
0022           - const: rockchip,rk3036-nfc
0023           - const: rockchip,rk2928-nfc
0024       - items:
0025           - const: rockchip,rk3308-nfc
0026           - const: rockchip,rv1108-nfc
0027 
0028   reg:
0029     maxItems: 1
0030 
0031   interrupts:
0032     maxItems: 1
0033 
0034   clocks:
0035     minItems: 1
0036     items:
0037       - description: Bus Clock
0038       - description: Module Clock
0039 
0040   clock-names:
0041     minItems: 1
0042     items:
0043       - const: ahb
0044       - const: nfc
0045 
0046   assigned-clocks:
0047     maxItems: 1
0048 
0049   assigned-clock-rates:
0050     maxItems: 1
0051 
0052   power-domains:
0053     maxItems: 1
0054 
0055 patternProperties:
0056   "^nand@[0-7]$":
0057     type: object
0058     properties:
0059       reg:
0060         minimum: 0
0061         maximum: 7
0062 
0063       nand-ecc-mode:
0064         const: hw
0065 
0066       nand-ecc-step-size:
0067         const: 1024
0068 
0069       nand-ecc-strength:
0070         enum: [16, 24, 40, 60, 70]
0071         description: |
0072           The ECC configurations that can be supported are as follows.
0073             NFC v600 ECC 16, 24, 40, 60
0074               RK2928, RK3066, RK3188
0075 
0076             NFC v622 ECC 16, 24, 40, 60
0077               RK3036, RK3128
0078 
0079             NFC v800 ECC 16
0080               RK3308, RV1108
0081 
0082             NFC v900 ECC 16, 40, 60, 70
0083               RK3326, PX30
0084 
0085       nand-bus-width:
0086         const: 8
0087 
0088       rockchip,boot-blks:
0089         $ref: /schemas/types.yaml#/definitions/uint32
0090         minimum: 2
0091         default: 16
0092         description:
0093           The NFC driver need this information to select ECC
0094           algorithms supported by the boot ROM.
0095           Only used in combination with 'nand-is-boot-medium'.
0096 
0097       rockchip,boot-ecc-strength:
0098         enum: [16, 24, 40, 60, 70]
0099         $ref: /schemas/types.yaml#/definitions/uint32
0100         description: |
0101           If specified it indicates that a different BCH/ECC setting is
0102           supported by the boot ROM.
0103             NFC v600 ECC 16, 24
0104               RK2928, RK3066, RK3188
0105 
0106             NFC v622 ECC 16, 24, 40, 60
0107               RK3036, RK3128
0108 
0109             NFC v800 ECC 16
0110               RK3308, RV1108
0111 
0112             NFC v900 ECC 16, 70
0113               RK3326, PX30
0114 
0115           Only used in combination with 'nand-is-boot-medium'.
0116 
0117 required:
0118   - compatible
0119   - reg
0120   - interrupts
0121   - clocks
0122   - clock-names
0123 
0124 unevaluatedProperties: false
0125 
0126 examples:
0127   - |
0128     #include <dt-bindings/clock/rk3308-cru.h>
0129     #include <dt-bindings/interrupt-controller/arm-gic.h>
0130     nfc: nand-controller@ff4b0000 {
0131       compatible = "rockchip,rk3308-nfc",
0132                    "rockchip,rv1108-nfc";
0133       reg = <0xff4b0000 0x4000>;
0134       interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
0135       clocks = <&cru HCLK_NANDC>, <&cru SCLK_NANDC>;
0136       clock-names = "ahb", "nfc";
0137       assigned-clocks = <&clks SCLK_NANDC>;
0138       assigned-clock-rates = <150000000>;
0139 
0140       pinctrl-0 = <&flash_ale &flash_bus8 &flash_cle &flash_csn0
0141                    &flash_rdn &flash_rdy &flash_wrn>;
0142       pinctrl-names = "default";
0143 
0144       #address-cells = <1>;
0145       #size-cells = <0>;
0146 
0147       nand@0 {
0148         reg = <0>;
0149         label = "rk-nand";
0150         nand-bus-width = <8>;
0151         nand-ecc-mode = "hw";
0152         nand-ecc-step-size = <1024>;
0153         nand-ecc-strength = <16>;
0154         nand-is-boot-medium;
0155         rockchip,boot-blks = <8>;
0156         rockchip,boot-ecc-strength = <16>;
0157       };
0158     };
0159 
0160 ...