0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/mtd/renesas-nandc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Renesas R-Car Gen3 & RZ/N1x NAND flash controller device tree bindings
0008
0009 maintainers:
0010 - Miquel Raynal <miquel.raynal@bootlin.com>
0011
0012 allOf:
0013 - $ref: "nand-controller.yaml"
0014
0015 properties:
0016 compatible:
0017 oneOf:
0018 - items:
0019 - enum:
0020 - renesas,r9a06g032-nandc
0021 - const: renesas,rzn1-nandc
0022
0023 reg:
0024 maxItems: 1
0025
0026 interrupts:
0027 maxItems: 1
0028
0029 clocks:
0030 items:
0031 - description: APB host controller clock
0032 - description: External NAND bus clock
0033
0034 clock-names:
0035 items:
0036 - const: hclk
0037 - const: eclk
0038
0039 power-domains:
0040 maxItems: 1
0041
0042 required:
0043 - compatible
0044 - reg
0045 - clocks
0046 - clock-names
0047 - power-domains
0048 - interrupts
0049
0050 unevaluatedProperties: false
0051
0052 examples:
0053 - |
0054 #include <dt-bindings/interrupt-controller/arm-gic.h>
0055 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
0056
0057 nand-controller@40102000 {
0058 compatible = "renesas,r9a06g032-nandc", "renesas,rzn1-nandc";
0059 reg = <0x40102000 0x2000>;
0060 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
0061 clocks = <&sysctrl R9A06G032_HCLK_NAND>, <&sysctrl R9A06G032_CLK_NAND>;
0062 clock-names = "hclk", "eclk";
0063 power-domains = <&sysctrl>;
0064 #address-cells = <1>;
0065 #size-cells = <0>;
0066 };
