0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/mtd/qcom,nandc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Qualcomm NAND controller
0008
0009 maintainers:
0010 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
0011
0012 properties:
0013 compatible:
0014 enum:
0015 - qcom,ipq806x-nand
0016 - qcom,ipq4019-nand
0017 - qcom,ipq6018-nand
0018 - qcom,ipq8074-nand
0019 - qcom,sdx55-nand
0020
0021 reg:
0022 maxItems: 1
0023
0024 clocks:
0025 items:
0026 - description: Core Clock
0027 - description: Always ON Clock
0028
0029 clock-names:
0030 items:
0031 - const: core
0032 - const: aon
0033
0034 "#address-cells": true
0035 "#size-cells": true
0036
0037 patternProperties:
0038 "^nand@[a-f0-9]$":
0039 type: object
0040 properties:
0041 nand-bus-width:
0042 const: 8
0043
0044 nand-ecc-strength:
0045 enum: [1, 4, 8]
0046
0047 nand-ecc-step-size:
0048 enum:
0049 - 512
0050
0051 allOf:
0052 - $ref: "nand-controller.yaml#"
0053
0054 - if:
0055 properties:
0056 compatible:
0057 contains:
0058 const: qcom,ipq806x-nand
0059 then:
0060 properties:
0061 dmas:
0062 items:
0063 - description: rxtx DMA channel
0064
0065 dma-names:
0066 items:
0067 - const: rxtx
0068
0069 qcom,cmd-crci:
0070 $ref: /schemas/types.yaml#/definitions/uint32
0071 description:
0072 Must contain the ADM command type CRCI block instance number
0073 specified for the NAND controller on the given platform
0074
0075 qcom,data-crci:
0076 $ref: /schemas/types.yaml#/definitions/uint32
0077 description:
0078 Must contain the ADM data type CRCI block instance number
0079 specified for the NAND controller on the given platform
0080
0081 - if:
0082 properties:
0083 compatible:
0084 contains:
0085 enum:
0086 - qcom,ipq4019-nand
0087 - qcom,ipq6018-nand
0088 - qcom,ipq8074-nand
0089 - qcom,sdx55-nand
0090
0091 then:
0092 properties:
0093 dmas:
0094 items:
0095 - description: tx DMA channel
0096 - description: rx DMA channel
0097 - description: cmd DMA channel
0098
0099 dma-names:
0100 items:
0101 - const: tx
0102 - const: rx
0103 - const: cmd
0104
0105 - if:
0106 properties:
0107 compatible:
0108 contains:
0109 enum:
0110 - qcom,ipq806x-nand
0111
0112 then:
0113 properties:
0114 qcom,boot-partitions:
0115 $ref: /schemas/types.yaml#/definitions/uint32-matrix
0116 items:
0117 items:
0118 - description: offset
0119 - description: size
0120 description:
0121 Boot partition use a different layout where the 4 bytes of spare
0122 data are not protected by ECC. Use this to declare these special
0123 partitions by defining first the offset and then the size.
0124
0125 It's in the form of <offset1 size1 offset2 size2 offset3 ...>
0126 and should be declared in ascending order.
0127
0128 Refer to the ipq8064 example on how to use this special binding.
0129
0130 required:
0131 - compatible
0132 - reg
0133 - clocks
0134 - clock-names
0135
0136 unevaluatedProperties: false
0137
0138 examples:
0139 - |
0140 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
0141 nand-controller@1ac00000 {
0142 compatible = "qcom,ipq806x-nand";
0143 reg = <0x1ac00000 0x800>;
0144
0145 clocks = <&gcc EBI2_CLK>,
0146 <&gcc EBI2_AON_CLK>;
0147 clock-names = "core", "aon";
0148
0149 dmas = <&adm_dma 3>;
0150 dma-names = "rxtx";
0151 qcom,cmd-crci = <15>;
0152 qcom,data-crci = <3>;
0153
0154 #address-cells = <1>;
0155 #size-cells = <0>;
0156
0157 nand@0 {
0158 reg = <0>;
0159
0160 nand-ecc-strength = <4>;
0161 nand-bus-width = <8>;
0162
0163 qcom,boot-partitions = <0x0 0x58a0000>;
0164
0165 partitions {
0166 compatible = "fixed-partitions";
0167 #address-cells = <1>;
0168 #size-cells = <1>;
0169
0170 partition@0 {
0171 label = "boot-nand";
0172 reg = <0 0x58a0000>;
0173 };
0174
0175 partition@58a0000 {
0176 label = "fs-nand";
0177 reg = <0x58a0000 0x4000000>;
0178 };
0179 };
0180 };
0181 };
0182
0183 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
0184 nand-controller@79b0000 {
0185 compatible = "qcom,ipq4019-nand";
0186 reg = <0x79b0000 0x1000>;
0187
0188 clocks = <&gcc GCC_QPIC_CLK>,
0189 <&gcc GCC_QPIC_AHB_CLK>;
0190 clock-names = "core", "aon";
0191
0192 dmas = <&qpicbam 0>,
0193 <&qpicbam 1>,
0194 <&qpicbam 2>;
0195 dma-names = "tx", "rx", "cmd";
0196
0197 #address-cells = <1>;
0198 #size-cells = <0>;
0199
0200 nand@0 {
0201 reg = <0>;
0202 nand-ecc-strength = <4>;
0203 nand-bus-width = <8>;
0204
0205 partitions {
0206 compatible = "fixed-partitions";
0207 #address-cells = <1>;
0208 #size-cells = <1>;
0209
0210 partition@0 {
0211 label = "boot-nand";
0212 reg = <0 0x58a0000>;
0213 };
0214
0215 partition@58a0000 {
0216 label = "fs-nand";
0217 reg = <0x58a0000 0x4000000>;
0218 };
0219 };
0220 };
0221 };
0222
0223 ...
