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OSCL-LXR

 
 

    


0001 Hisilicon Hip04 Soc NAND controller DT binding
0002 
0003 Required properties:
0004 
0005 - compatible:          Should be "hisilicon,504-nfc".
0006 - reg:                 The first contains base physical address and size of
0007                        NAND controller's registers. The second contains base
0008                        physical address and size of NAND controller's buffer.
0009 - interrupts:          Interrupt number for nfc.
0010 - nand-bus-width:      See nand-controller.yaml.
0011 - nand-ecc-mode:       Support none and hw ecc mode.
0012 - #address-cells:      Partition address, should be set 1.
0013 - #size-cells:         Partition size, should be set 1.
0014 
0015 Optional properties:
0016 
0017 - nand-ecc-strength:   Number of bits to correct per ECC step.
0018 - nand-ecc-step-size:  Number of data bytes covered by a single ECC step.
0019 
0020 The following ECC strength and step size are currently supported:
0021 
0022  - nand-ecc-strength = <16>, nand-ecc-step-size = <1024>
0023 
0024 Flash chip may optionally contain additional sub-nodes describing partitions of
0025 the address space. See partition.txt for more detail.
0026 
0027 Example:
0028 
0029         nand: nand@4020000 {
0030                 compatible = "hisilicon,504-nfc";
0031                 reg = <0x4020000 0x10000>, <0x5000000 0x1000>;
0032                 interrupts = <0 379 4>;
0033                 nand-bus-width = <8>;
0034                 nand-ecc-mode = "hw";
0035                 nand-ecc-strength = <16>;
0036                 nand-ecc-step-size = <1024>;
0037                 #address-cells = <1>;
0038                 #size-cells = <1>;
0039 
0040                 partition@0 {
0041                         label = "nand_text";
0042                         reg = <0x00000000 0x00400000>;
0043                 };
0044 
0045                 ...
0046 
0047         };