0001 Atmel NAND flash controller bindings
0002
0003 The NAND flash controller node should be defined under the EBI bus (see
0004 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
0005 One or several NAND devices can be defined under this NAND controller.
0006 The NAND controller might be connected to an ECC engine.
0007
0008 * NAND controller bindings:
0009
0010 Required properties:
0011 - compatible: should be one of the following
0012 "atmel,at91rm9200-nand-controller"
0013 "atmel,at91sam9260-nand-controller"
0014 "atmel,at91sam9261-nand-controller"
0015 "atmel,at91sam9g45-nand-controller"
0016 "atmel,sama5d3-nand-controller"
0017 "microchip,sam9x60-nand-controller"
0018 - ranges: empty ranges property to forward EBI ranges definitions.
0019 - #address-cells: should be set to 2.
0020 - #size-cells: should be set to 1.
0021 - atmel,nfc-io: phandle to the NFC IO block. Only required for sama5d3
0022 controllers.
0023 - atmel,nfc-sram: phandle to the NFC SRAM block. Only required for sama5d3
0024 controllers.
0025
0026 Optional properties:
0027 - ecc-engine: phandle to the PMECC block. Only meaningful if the SoC embeds
0028 a PMECC engine.
0029
0030 * NAND device/chip bindings:
0031
0032 Required properties:
0033 - reg: describes the CS lines assigned to the NAND device. If the NAND device
0034 exposes multiple CS lines (multi-dies chips), your reg property will
0035 contain X tuples of 3 entries.
0036 1st entry: the CS line this NAND chip is connected to
0037 2nd entry: the base offset of the memory region assigned to this
0038 device (always 0)
0039 3rd entry: the memory region size (always 0x800000)
0040
0041 Optional properties:
0042 - rb-gpios: the GPIO(s) used to check the Ready/Busy status of the NAND.
0043 - cs-gpios: the GPIO(s) used to control the CS line.
0044 - det-gpios: the GPIO used to detect if a Smartmedia Card is present.
0045 - atmel,rb: an integer identifying the native Ready/Busy pin. Only meaningful
0046 on sama5 SoCs.
0047
0048 All generic properties described in
0049 Documentation/devicetree/bindings/mtd/{common,nand}.txt also apply to the NAND
0050 device node, and NAND partitions should be defined under the NAND node as
0051 described in Documentation/devicetree/bindings/mtd/partition.txt.
0052
0053 * ECC engine (PMECC) bindings:
0054
0055 Required properties:
0056 - compatible: should be one of the following
0057 "atmel,at91sam9g45-pmecc"
0058 "atmel,sama5d4-pmecc"
0059 "atmel,sama5d2-pmecc"
0060 "microchip,sam9x60-pmecc"
0061 - reg: should contain 2 register ranges. The first one is pointing to the PMECC
0062 block, and the second one to the PMECC_ERRLOC block.
0063
0064 * SAMA5 NFC I/O bindings:
0065
0066 SAMA5 SoCs embed an advanced NAND controller logic to automate READ/WRITE page
0067 operations. This interface to this logic is placed in a separate I/O range and
0068 should thus have its own DT node.
0069
0070 - compatible: should be "atmel,sama5d3-nfc-io", "syscon".
0071 - reg: should contain the I/O range used to interact with the NFC logic.
0072
0073 Example:
0074
0075 nfc_io: nfc-io@70000000 {
0076 compatible = "atmel,sama5d3-nfc-io", "syscon";
0077 reg = <0x70000000 0x8000000>;
0078 };
0079
0080 pmecc: ecc-engine@ffffc070 {
0081 compatible = "atmel,at91sam9g45-pmecc";
0082 reg = <0xffffc070 0x490>,
0083 <0xffffc500 0x100>;
0084 };
0085
0086 ebi: ebi@10000000 {
0087 compatible = "atmel,sama5d3-ebi";
0088 #address-cells = <2>;
0089 #size-cells = <1>;
0090 atmel,smc = <&hsmc>;
0091 reg = <0x10000000 0x10000000
0092 0x40000000 0x30000000>;
0093 ranges = <0x0 0x0 0x10000000 0x10000000
0094 0x1 0x0 0x40000000 0x10000000
0095 0x2 0x0 0x50000000 0x10000000
0096 0x3 0x0 0x60000000 0x10000000>;
0097 clocks = <&mck>;
0098
0099 nand_controller: nand-controller {
0100 compatible = "atmel,sama5d3-nand-controller";
0101 atmel,nfc-sram = <&nfc_sram>;
0102 atmel,nfc-io = <&nfc_io>;
0103 ecc-engine = <&pmecc>;
0104 #address-cells = <2>;
0105 #size-cells = <1>;
0106 ranges;
0107
0108 nand@3 {
0109 reg = <0x3 0x0 0x800000>;
0110 atmel,rb = <0>;
0111
0112 /*
0113 * Put generic NAND/MTD properties and
0114 * subnodes here.
0115 */
0116 };
0117 };
0118 };
0119
0120 -----------------------------------------------------------------------
0121
0122 Deprecated bindings (should not be used in new device trees):
0123
0124 Required properties:
0125 - compatible: The possible values are:
0126 "atmel,at91rm9200-nand"
0127 "atmel,sama5d2-nand"
0128 "atmel,sama5d4-nand"
0129 - reg : should specify localbus address and size used for the chip,
0130 and hardware ECC controller if available.
0131 If the hardware ECC is PMECC, it should contain address and size for
0132 PMECC and PMECC Error Location controller.
0133 The PMECC lookup table address and size in ROM is optional. If not
0134 specified, driver will build it in runtime.
0135 - atmel,nand-addr-offset : offset for the address latch.
0136 - atmel,nand-cmd-offset : offset for the command latch.
0137 - #address-cells, #size-cells : Must be present if the device has sub-nodes
0138 representing partitions.
0139
0140 - gpios : specifies the gpio pins to control the NAND device. detect is an
0141 optional gpio and may be set to 0 if not present.
0142
0143 Optional properties:
0144 - atmel,nand-has-dma : boolean to support dma transfer for nand read/write.
0145 - nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default.
0146 Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first",
0147 "soft_bch".
0148 - atmel,has-pmecc : boolean to enable Programmable Multibit ECC hardware,
0149 capable of BCH encoding and decoding, on devices where it is present.
0150 - atmel,pmecc-cap : error correct capability for Programmable Multibit ECC
0151 Controller. Supported values are: 2, 4, 8, 12, 24. If the compatible string
0152 is "atmel,sama5d2-nand", 32 is also valid.
0153 - atmel,pmecc-sector-size : sector size for ECC computation. Supported values
0154 are: 512, 1024.
0155 - atmel,pmecc-lookup-table-offset : includes two offsets of lookup table in ROM
0156 for different sector size. First one is for sector size 512, the next is for
0157 sector size 1024. If not specified, driver will build the table in runtime.
0158 - nand-bus-width : 8 or 16 bus width if not present 8
0159 - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false
0160
0161 Nand Flash Controller(NFC) is an optional sub-node
0162 Required properties:
0163 - compatible : "atmel,sama5d3-nfc".
0164 - reg : should specify the address and size used for NFC command registers,
0165 NFC registers and NFC SRAM. NFC SRAM address and size can be absent
0166 if don't want to use it.
0167 - clocks: phandle to the peripheral clock
0168 Optional properties:
0169 - atmel,write-by-sram: boolean to enable NFC write by SRAM.
0170
0171 Examples:
0172 nand0: nand@40000000,0 {
0173 compatible = "atmel,at91rm9200-nand";
0174 #address-cells = <1>;
0175 #size-cells = <1>;
0176 reg = <0x40000000 0x10000000
0177 0xffffe800 0x200
0178 >;
0179 atmel,nand-addr-offset = <21>; /* ale */
0180 atmel,nand-cmd-offset = <22>; /* cle */
0181 nand-on-flash-bbt;
0182 nand-ecc-mode = "soft";
0183 gpios = <&pioC 13 0 /* rdy */
0184 &pioC 14 0 /* nce */
0185 0 /* cd */
0186 >;
0187 partition@0 {
0188 ...
0189 };
0190 };
0191
0192 /* for PMECC supported chips */
0193 nand0: nand@40000000 {
0194 compatible = "atmel,at91rm9200-nand";
0195 #address-cells = <1>;
0196 #size-cells = <1>;
0197 reg = < 0x40000000 0x10000000 /* bus addr & size */
0198 0xffffe000 0x00000600 /* PMECC addr & size */
0199 0xffffe600 0x00000200 /* PMECC ERRLOC addr & size */
0200 0x00100000 0x00100000 /* ROM addr & size */
0201 >;
0202 atmel,nand-addr-offset = <21>; /* ale */
0203 atmel,nand-cmd-offset = <22>; /* cle */
0204 nand-on-flash-bbt;
0205 nand-ecc-mode = "hw";
0206 atmel,has-pmecc; /* enable PMECC */
0207 atmel,pmecc-cap = <2>;
0208 atmel,pmecc-sector-size = <512>;
0209 atmel,pmecc-lookup-table-offset = <0x8000 0x10000>;
0210 gpios = <&pioD 5 0 /* rdy */
0211 &pioD 4 0 /* nce */
0212 0 /* cd */
0213 >;
0214 partition@0 {
0215 ...
0216 };
0217 };
0218
0219 /* for NFC supported chips */
0220 nand0: nand@40000000 {
0221 compatible = "atmel,at91rm9200-nand";
0222 #address-cells = <1>;
0223 #size-cells = <1>;
0224 ranges;
0225 ...
0226 nfc@70000000 {
0227 compatible = "atmel,sama5d3-nfc";
0228 #address-cells = <1>;
0229 #size-cells = <1>;
0230 clocks = <&hsmc_clk>
0231 reg = <
0232 0x70000000 0x10000000 /* NFC Command Registers */
0233 0xffffc000 0x00000070 /* NFC HSMC regs */
0234 0x00200000 0x00100000 /* NFC SRAM banks */
0235 >;
0236 };
0237 };
