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0001 # SPDX-License-Identifier: GPL-2.0-only
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Synopsys Designware Mobile Storage Host Controller Binding
0008 
0009 maintainers:
0010   - Ulf Hansson <ulf.hansson@linaro.org>
0011   - Jisheng Zhang <Jisheng.Zhang@synaptics.com>
0012 
0013 allOf:
0014   - $ref: mmc-controller.yaml#
0015 
0016 properties:
0017   compatible:
0018     enum:
0019       - rockchip,rk3568-dwcmshc
0020       - rockchip,rk3588-dwcmshc
0021       - snps,dwcmshc-sdhci
0022 
0023   reg:
0024     maxItems: 1
0025 
0026   interrupts:
0027     maxItems: 1
0028 
0029   clocks:
0030     minItems: 1
0031     items:
0032       - description: core clock
0033       - description: bus clock for optional
0034       - description: axi clock for rockchip specified
0035       - description: block clock for rockchip specified
0036       - description: timer clock for rockchip specified
0037 
0038 
0039   clock-names:
0040     minItems: 1
0041     items:
0042       - const: core
0043       - const: bus
0044       - const: axi
0045       - const: block
0046       - const: timer
0047 
0048   rockchip,txclk-tapnum:
0049     description: Specify the number of delay for tx sampling.
0050     $ref: /schemas/types.yaml#/definitions/uint8
0051 
0052 
0053 required:
0054   - compatible
0055   - reg
0056   - interrupts
0057   - clocks
0058   - clock-names
0059 
0060 unevaluatedProperties: false
0061 
0062 examples:
0063   - |
0064     mmc@fe310000 {
0065       compatible = "rockchip,rk3568-dwcmshc";
0066       reg = <0xfe310000 0x10000>;
0067       interrupts = <0 25 0x4>;
0068       clocks = <&cru 17>, <&cru 18>, <&cru 19>, <&cru 20>, <&cru 21>;
0069       clock-names = "core", "bus", "axi", "block", "timer";
0070       bus-width = <8>;
0071       #address-cells = <1>;
0072       #size-cells = <0>;
0073     };
0074   - |
0075     mmc@aa0000 {
0076       compatible = "snps,dwcmshc-sdhci";
0077       reg = <0xaa000 0x1000>;
0078       interrupts = <0 25 0x4>;
0079       clocks = <&cru 17>, <&cru 18>;
0080       clock-names = "core", "bus";
0081       bus-width = <8>;
0082       #address-cells = <1>;
0083       #size-cells = <0>;
0084     };
0085 
0086 ...