0001 * STMicroelectronics sdhci-st MMC/SD controller
0002
0003 This file documents the differences between the core properties in
0004 Documentation/devicetree/bindings/mmc/mmc.txt and the properties
0005 used by the sdhci-st driver.
0006
0007 Required properties:
0008 - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
0009 to set the internal glue logic used for configuring the MMC
0010 subsystem (mmcss) inside the FlashSS (available in STiH407 SoC
0011 family).
0012
0013 - clock-names: Should be "mmc" and "icn". (NB: The latter is not compulsory)
0014 See: Documentation/devicetree/bindings/resource-names.txt
0015 - clocks: Phandle to the clock.
0016 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
0017
0018 - interrupts: One mmc interrupt should be described here.
0019 - interrupt-names: Should be "mmcirq".
0020
0021 - pinctrl-names: A pinctrl state names "default" must be defined.
0022 - pinctrl-0: Phandle referencing pin configuration of the sd/emmc controller.
0023 See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
0024
0025 - reg: This must provide the host controller base address and it can also
0026 contain the FlashSS Top register for TX/RX delay used by the driver
0027 to configure DLL inside the flashSS, if so reg-names must also be
0028 specified.
0029
0030 Optional properties:
0031 - reg-names: Should be "mmc" and "top-mmc-delay". "top-mmc-delay" is optional
0032 for eMMC on stih407 family silicon to configure DLL inside FlashSS.
0033
0034 - non-removable: Non-removable slot. Also used for configuring mmcss in STiH407 SoC
0035 family.
0036 See: Documentation/devicetree/bindings/mmc/mmc.txt.
0037
0038 - bus-width: Number of data lines.
0039 See: Documentation/devicetree/bindings/mmc/mmc.txt.
0040
0041 - max-frequency: Can be 200MHz, 100MHz or 50MHz (default) and used for
0042 configuring the CCONFIG3 in the mmcss.
0043 See: Documentation/devicetree/bindings/mmc/mmc.txt.
0044
0045 - resets: Phandle and reset specifier pair to softreset line of HC IP.
0046 See: Documentation/devicetree/bindings/reset/reset.txt
0047
0048 - vqmmc-supply: Phandle to the regulator dt node, mentioned as the vcc/vdd
0049 supply in eMMC/SD specs.
0050
0051 - sd-uhs-sdr50: To enable the SDR50 in the mmcss.
0052 See: Documentation/devicetree/bindings/mmc/mmc.txt.
0053
0054 - sd-uhs-sdr104: To enable the SDR104 in the mmcss.
0055 See: Documentation/devicetree/bindings/mmc/mmc.txt.
0056
0057 - sd-uhs-ddr50: To enable the DDR50 in the mmcss.
0058 See: Documentation/devicetree/bindings/mmc/mmc.txt.
0059
0060 Example:
0061
0062 /* Example stih416e eMMC configuration */
0063
0064 mmc0: sdhci@fe81e000 {
0065 compatible = "st,sdhci";
0066 reg = <0xfe81e000 0x1000>;
0067 interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>;
0068 interrupt-names = "mmcirq";
0069 pinctrl-names = "default";
0070 pinctrl-0 = <&pinctrl_mmc0>;
0071 clock-names = "mmc";
0072 clocks = <&clk_s_a1_ls 1>;
0073 bus-width = <8>
0074
0075 /* Example SD stih407 family configuration */
0076
0077 mmc1: sdhci@9080000 {
0078 compatible = "st,sdhci-stih407", "st,sdhci";
0079 reg = <0x09080000 0x7ff>;
0080 reg-names = "mmc";
0081 interrupts = <GIC_SPI 90 IRQ_TYPE_NONE>;
0082 interrupt-names = "mmcirq";
0083 pinctrl-names = "default";
0084 pinctrl-0 = <&pinctrl_sd1>;
0085 clock-names = "mmc";
0086 clocks = <&clk_s_c0_flexgen CLK_MMC_1>;
0087 resets = <&softreset STIH407_MMC1_SOFTRESET>;
0088 bus-width = <4>;
0089 };
0090
0091 /* Example eMMC stih407 family configuration */
0092
0093 mmc0: sdhci@9060000 {
0094 compatible = "st,sdhci-stih407", "st,sdhci";
0095 reg = <0x09060000 0x7ff>, <0x9061008 0x20>;
0096 reg-names = "mmc", "top-mmc-delay";
0097 interrupts = <GIC_SPI 92 IRQ_TYPE_NONE>;
0098 interrupt-names = "mmcirq";
0099 pinctrl-names = "default";
0100 pinctrl-0 = <&pinctrl_mmc0>;
0101 clock-names = "mmc";
0102 clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
0103 vqmmc-supply = <&vmmc_reg>;
0104 max-frequency = <200000000>;
0105 bus-width = <8>;
0106 non-removable;
0107 sd-uhs-sdr50;
0108 sd-uhs-sdr104;
0109 sd-uhs-ddr50;
0110 };
