0001 # SPDX-License-Identifier: GPL-2.0-only
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/mmc/sdhci-pxa.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Marvell PXA SDHCI v2/v3 bindings
0008
0009 maintainers:
0010 - Ulf Hansson <ulf.hansson@linaro.org>
0011
0012 allOf:
0013 - $ref: mmc-controller.yaml#
0014 - if:
0015 properties:
0016 compatible:
0017 contains:
0018 const: marvell,armada-380-sdhci
0019 then:
0020 properties:
0021 regs:
0022 minItems: 3
0023 reg-names:
0024 minItems: 3
0025 required:
0026 - reg-names
0027 else:
0028 properties:
0029 regs:
0030 maxItems: 1
0031 reg-names:
0032 maxItems: 1
0033
0034 properties:
0035 compatible:
0036 enum:
0037 - mrvl,pxav2-mmc
0038 - mrvl,pxav3-mmc
0039 - marvell,armada-380-sdhci
0040
0041 reg:
0042 minItems: 1
0043 maxItems: 3
0044
0045 reg-names:
0046 items:
0047 - const: sdhci
0048 - const: mbus
0049 - const: conf-sdio3
0050
0051 interrupts:
0052 maxItems: 1
0053
0054 clocks:
0055 minItems: 1
0056 maxItems: 2
0057
0058 clock-names:
0059 minItems: 1
0060 items:
0061 - const: io
0062 - const: core
0063
0064 mrvl,clk-delay-cycles:
0065 description: Specify a number of cycles to delay for tuning.
0066 $ref: /schemas/types.yaml#/definitions/uint32
0067
0068 required:
0069 - compatible
0070 - reg
0071 - interrupts
0072 - clocks
0073 - clock-names
0074
0075 unevaluatedProperties: false
0076
0077 examples:
0078 - |
0079 #include <dt-bindings/clock/berlin2.h>
0080 mmc@d4280800 {
0081 compatible = "mrvl,pxav3-mmc";
0082 reg = <0xd4280800 0x800>;
0083 bus-width = <8>;
0084 interrupts = <27>;
0085 clocks = <&chip CLKID_SDIO1XIN>, <&chip CLKID_SDIO1>;
0086 clock-names = "io", "core";
0087 non-removable;
0088 mrvl,clk-delay-cycles = <31>;
0089 };
0090 - |
0091 mmc@d8000 {
0092 compatible = "marvell,armada-380-sdhci";
0093 reg-names = "sdhci", "mbus", "conf-sdio3";
0094 reg = <0xd8000 0x1000>,
0095 <0xdc000 0x100>,
0096 <0x18454 0x4>;
0097 interrupts = <0 25 0x4>;
0098 clocks = <&gateclk 17>;
0099 clock-names = "io";
0100 mrvl,clk-delay-cycles = <0x1F>;
0101 };
0102
0103 ...
