0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Rockchip designware mobile storage host controller device tree bindings
0008
0009 description:
0010 Rockchip uses the Synopsys designware mobile storage host controller
0011 to interface a SoC with storage medium such as eMMC or SD/MMC cards.
0012 This file documents the combined properties for the core Synopsys dw mshc
0013 controller that are not already included in the synopsys-dw-mshc-common.yaml
0014 file and the Rockchip specific extensions.
0015
0016 allOf:
0017 - $ref: "synopsys-dw-mshc-common.yaml#"
0018
0019 maintainers:
0020 - Heiko Stuebner <heiko@sntech.de>
0021
0022 # Everything else is described in the common file
0023 properties:
0024 compatible:
0025 oneOf:
0026 # for Rockchip RK2928 and before RK3288
0027 - const: rockchip,rk2928-dw-mshc
0028 # for Rockchip RK3288
0029 - const: rockchip,rk3288-dw-mshc
0030 - items:
0031 - enum:
0032 - rockchip,px30-dw-mshc
0033 - rockchip,rk1808-dw-mshc
0034 - rockchip,rk3036-dw-mshc
0035 - rockchip,rk3228-dw-mshc
0036 - rockchip,rk3308-dw-mshc
0037 - rockchip,rk3328-dw-mshc
0038 - rockchip,rk3368-dw-mshc
0039 - rockchip,rk3399-dw-mshc
0040 - rockchip,rk3568-dw-mshc
0041 - rockchip,rv1108-dw-mshc
0042 - rockchip,rv1126-dw-mshc
0043 - const: rockchip,rk3288-dw-mshc
0044
0045 reg:
0046 maxItems: 1
0047
0048 interrupts:
0049 maxItems: 1
0050
0051 clocks:
0052 minItems: 2
0053 maxItems: 4
0054 description:
0055 Handle to "biu" and "ciu" clocks for the bus interface unit clock and
0056 the card interface unit clock. If "ciu-drive" and "ciu-sample" are
0057 specified in clock-names, it should also contain
0058 handles to these clocks.
0059
0060 clock-names:
0061 minItems: 2
0062 items:
0063 - const: biu
0064 - const: ciu
0065 - const: ciu-drive
0066 - const: ciu-sample
0067 description:
0068 Apart from the clock-names "biu" and "ciu" two more clocks
0069 "ciu-drive" and "ciu-sample" are supported. They are used
0070 to control the clock phases, "ciu-sample" is required for tuning
0071 high speed modes.
0072
0073 rockchip,default-sample-phase:
0074 $ref: /schemas/types.yaml#/definitions/uint32
0075 minimum: 0
0076 maximum: 360
0077 default: 0
0078 description:
0079 The default phase to set "ciu-sample" at probing,
0080 low speeds or in case where all phases work at tuning time.
0081 If not specified 0 deg will be used.
0082
0083 rockchip,desired-num-phases:
0084 $ref: /schemas/types.yaml#/definitions/uint32
0085 minimum: 0
0086 maximum: 360
0087 default: 360
0088 description:
0089 The desired number of times that the host execute tuning when needed.
0090 If not specified, the host will do tuning for 360 times,
0091 namely tuning for each degree.
0092
0093 required:
0094 - compatible
0095 - reg
0096 - interrupts
0097 - clocks
0098 - clock-names
0099
0100 unevaluatedProperties: false
0101
0102 examples:
0103 - |
0104 #include <dt-bindings/clock/rk3288-cru.h>
0105 #include <dt-bindings/interrupt-controller/arm-gic.h>
0106 #include <dt-bindings/interrupt-controller/irq.h>
0107 sdmmc: mmc@ff0c0000 {
0108 compatible = "rockchip,rk3288-dw-mshc";
0109 reg = <0xff0c0000 0x4000>;
0110 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
0111 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
0112 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
0113 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
0114 resets = <&cru SRST_MMC0>;
0115 reset-names = "reset";
0116 fifo-depth = <0x100>;
0117 max-frequency = <150000000>;
0118 };
0119
0120 ...
