0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: MMC Controller Generic Binding
0008
0009 maintainers:
0010 - Ulf Hansson <ulf.hansson@linaro.org>
0011
0012 description: |
0013 These properties are common to multiple MMC host controllers. Any host
0014 that requires the respective functionality should implement them using
0015 these definitions.
0016
0017 It is possible to assign a fixed index mmcN to an MMC host controller
0018 (and the corresponding mmcblkN devices) by defining an alias in the
0019 /aliases device tree node.
0020
0021 properties:
0022 $nodename:
0023 pattern: "^mmc(@.*)?$"
0024
0025 "#address-cells":
0026 const: 1
0027 description: |
0028 The cell is the slot ID if a function subnode is used.
0029
0030 "#size-cells":
0031 const: 0
0032
0033 # Card Detection.
0034 # If none of these properties are supplied, the host native card
0035 # detect will be used. Only one of them should be provided.
0036
0037 broken-cd:
0038 $ref: /schemas/types.yaml#/definitions/flag
0039 description:
0040 There is no card detection available; polling must be used.
0041
0042 cd-gpios:
0043 maxItems: 1
0044 description:
0045 The card detection will be done using the GPIO provided.
0046
0047 non-removable:
0048 $ref: /schemas/types.yaml#/definitions/flag
0049 description:
0050 Non-removable slot (like eMMC); assume always present.
0051
0052 # *NOTE* on CD and WP polarity. To use common for all SD/MMC host
0053 # controllers line polarity properties, we have to fix the meaning
0054 # of the "normal" and "inverted" line levels. We choose to follow
0055 # the SDHCI standard, which specifies both those lines as "active
0056 # low." Therefore, using the "cd-inverted" property means, that the
0057 # CD line is active high, i.e. it is high, when a card is
0058 # inserted. Similar logic applies to the "wp-inverted" property.
0059 #
0060 # CD and WP lines can be implemented on the hardware in one of two
0061 # ways: as GPIOs, specified in cd-gpios and wp-gpios properties, or
0062 # as dedicated pins. Polarity of dedicated pins can be specified,
0063 # using *-inverted properties. GPIO polarity can also be specified
0064 # using the GPIO_ACTIVE_LOW flag. This creates an ambiguity in the
0065 # latter case. We choose to use the XOR logic for GPIO CD and WP
0066 # lines. This means, the two properties are "superimposed," for
0067 # example leaving the GPIO_ACTIVE_LOW flag clear and specifying the
0068 # respective *-inverted property property results in a
0069 # double-inversion and actually means the "normal" line polarity is
0070 # in effect.
0071 wp-inverted:
0072 $ref: /schemas/types.yaml#/definitions/flag
0073 description:
0074 The Write Protect line polarity is inverted.
0075
0076 cd-inverted:
0077 $ref: /schemas/types.yaml#/definitions/flag
0078 description:
0079 The CD line polarity is inverted.
0080
0081 # Other properties
0082
0083 bus-width:
0084 description:
0085 Number of data lines.
0086 $ref: /schemas/types.yaml#/definitions/uint32
0087 enum: [1, 4, 8]
0088 default: 1
0089
0090 max-frequency:
0091 description:
0092 Maximum operating frequency of the bus.
0093 $ref: /schemas/types.yaml#/definitions/uint32
0094 minimum: 400000
0095 maximum: 200000000
0096
0097 disable-wp:
0098 $ref: /schemas/types.yaml#/definitions/flag
0099 description:
0100 When set, no physical write-protect line is present. This
0101 property should only be specified when the controller has a
0102 dedicated write-protect detection logic. If a GPIO is always used
0103 for the write-protect detection logic, it is sufficient to not
0104 specify the wp-gpios property in the absence of a write-protect
0105 line. Not used in combination with eMMC or SDIO.
0106
0107 wp-gpios:
0108 maxItems: 1
0109 description:
0110 GPIO to use for the write-protect detection.
0111
0112 cd-debounce-delay-ms:
0113 description:
0114 Set delay time before detecting card after card insert
0115 interrupt.
0116
0117 no-1-8-v:
0118 $ref: /schemas/types.yaml#/definitions/flag
0119 description:
0120 When specified, denotes that 1.8V card voltage is not supported
0121 on this system, even if the controller claims it.
0122
0123 cap-sd-highspeed:
0124 $ref: /schemas/types.yaml#/definitions/flag
0125 description:
0126 SD high-speed timing is supported.
0127
0128 cap-mmc-highspeed:
0129 $ref: /schemas/types.yaml#/definitions/flag
0130 description:
0131 MMC high-speed timing is supported.
0132
0133 sd-uhs-sdr12:
0134 $ref: /schemas/types.yaml#/definitions/flag
0135 description:
0136 SD UHS SDR12 speed is supported.
0137
0138 sd-uhs-sdr25:
0139 $ref: /schemas/types.yaml#/definitions/flag
0140 description:
0141 SD UHS SDR25 speed is supported.
0142
0143 sd-uhs-sdr50:
0144 $ref: /schemas/types.yaml#/definitions/flag
0145 description:
0146 SD UHS SDR50 speed is supported.
0147
0148 sd-uhs-sdr104:
0149 $ref: /schemas/types.yaml#/definitions/flag
0150 description:
0151 SD UHS SDR104 speed is supported.
0152
0153 sd-uhs-ddr50:
0154 $ref: /schemas/types.yaml#/definitions/flag
0155 description:
0156 SD UHS DDR50 speed is supported.
0157
0158 cap-power-off-card:
0159 $ref: /schemas/types.yaml#/definitions/flag
0160 description:
0161 Powering off the card is safe.
0162
0163 cap-mmc-hw-reset:
0164 $ref: /schemas/types.yaml#/definitions/flag
0165 description:
0166 eMMC hardware reset is supported
0167
0168 cap-sdio-irq:
0169 $ref: /schemas/types.yaml#/definitions/flag
0170 description:
0171 enable SDIO IRQ signalling on this interface
0172
0173 full-pwr-cycle:
0174 $ref: /schemas/types.yaml#/definitions/flag
0175 description:
0176 Full power cycle of the card is supported.
0177
0178 full-pwr-cycle-in-suspend:
0179 $ref: /schemas/types.yaml#/definitions/flag
0180 description:
0181 Full power cycle of the card in suspend is supported.
0182
0183 mmc-ddr-1_2v:
0184 $ref: /schemas/types.yaml#/definitions/flag
0185 description:
0186 eMMC high-speed DDR mode (1.2V I/O) is supported.
0187
0188 mmc-ddr-1_8v:
0189 $ref: /schemas/types.yaml#/definitions/flag
0190 description:
0191 eMMC high-speed DDR mode (1.8V I/O) is supported.
0192
0193 mmc-ddr-3_3v:
0194 $ref: /schemas/types.yaml#/definitions/flag
0195 description:
0196 eMMC high-speed DDR mode (3.3V I/O) is supported.
0197
0198 mmc-hs200-1_2v:
0199 $ref: /schemas/types.yaml#/definitions/flag
0200 description:
0201 eMMC HS200 mode (1.2V I/O) is supported.
0202
0203 mmc-hs200-1_8v:
0204 $ref: /schemas/types.yaml#/definitions/flag
0205 description:
0206 eMMC HS200 mode (1.8V I/O) is supported.
0207
0208 mmc-hs400-1_2v:
0209 $ref: /schemas/types.yaml#/definitions/flag
0210 description:
0211 eMMC HS400 mode (1.2V I/O) is supported.
0212
0213 mmc-hs400-1_8v:
0214 $ref: /schemas/types.yaml#/definitions/flag
0215 description:
0216 eMMC HS400 mode (1.8V I/O) is supported.
0217
0218 mmc-hs400-enhanced-strobe:
0219 $ref: /schemas/types.yaml#/definitions/flag
0220 description:
0221 eMMC HS400 enhanced strobe mode is supported
0222
0223 no-mmc-hs400:
0224 $ref: /schemas/types.yaml#/definitions/flag
0225 description:
0226 All eMMC HS400 modes are not supported.
0227
0228 dsr:
0229 description:
0230 Value the card Driver Stage Register (DSR) should be programmed
0231 with.
0232 $ref: /schemas/types.yaml#/definitions/uint32
0233 minimum: 0
0234 maximum: 0xffff
0235
0236 no-sdio:
0237 $ref: /schemas/types.yaml#/definitions/flag
0238 description:
0239 Controller is limited to send SDIO commands during
0240 initialization.
0241
0242 no-sd:
0243 $ref: /schemas/types.yaml#/definitions/flag
0244 description:
0245 Controller is limited to send SD commands during initialization.
0246
0247 no-mmc:
0248 $ref: /schemas/types.yaml#/definitions/flag
0249 description:
0250 Controller is limited to send MMC commands during
0251 initialization.
0252
0253 fixed-emmc-driver-type:
0254 description:
0255 For non-removable eMMC, enforce this driver type. The value is
0256 the driver type as specified in the eMMC specification (table
0257 206 in spec version 5.1)
0258 $ref: /schemas/types.yaml#/definitions/uint32
0259 minimum: 0
0260 maximum: 4
0261
0262 post-power-on-delay-ms:
0263 description:
0264 It was invented for MMC pwrseq-simple which could be referred to
0265 mmc-pwrseq-simple.txt. But now it\'s reused as a tunable delay
0266 waiting for I/O signalling and card power supply to be stable,
0267 regardless of whether pwrseq-simple is used. Default to 10ms if
0268 no available.
0269 default: 10
0270
0271 supports-cqe:
0272 $ref: /schemas/types.yaml#/definitions/flag
0273 description:
0274 The presence of this property indicates that the corresponding
0275 MMC host controller supports HW command queue feature.
0276
0277 disable-cqe-dcmd:
0278 $ref: /schemas/types.yaml#/definitions/flag
0279 description:
0280 The presence of this property indicates that the MMC
0281 controller\'s command queue engine (CQE) does not support direct
0282 commands (DCMDs).
0283
0284 keep-power-in-suspend:
0285 $ref: /schemas/types.yaml#/definitions/flag
0286 description:
0287 SDIO only. Preserves card power during a suspend/resume cycle.
0288
0289 # Deprecated: enable-sdio-wakeup
0290 wakeup-source:
0291 $ref: /schemas/types.yaml#/definitions/flag
0292 description:
0293 SDIO only. Enables wake up of host system on SDIO IRQ assertion.
0294
0295 vmmc-supply:
0296 description:
0297 Supply for the card power
0298
0299 vqmmc-supply:
0300 description:
0301 Supply for the bus IO line power, such as a level shifter.
0302 If the level shifter is controlled by a GPIO line, this shall
0303 be modeled as a "regulator-fixed" with a GPIO line for
0304 switching the level shifter on/off.
0305
0306 mmc-pwrseq:
0307 $ref: /schemas/types.yaml#/definitions/phandle
0308 description:
0309 System-on-Chip designs may specify a specific MMC power
0310 sequence. To successfully detect an (e)MMC/SD/SDIO card, that
0311 power sequence must be maintained while initializing the card.
0312
0313 patternProperties:
0314 "^.*@[0-9]+$":
0315 type: object
0316 description: |
0317 On embedded systems the cards connected to a host may need
0318 additional properties. These can be specified in subnodes to the
0319 host controller node. The subnodes are identified by the
0320 standard \'reg\' property. Which information exactly can be
0321 specified depends on the bindings for the SDIO function driver
0322 for the subnode, as specified by the compatible string.
0323
0324 properties:
0325 compatible:
0326 description: |
0327 Name of SDIO function following generic names recommended
0328 practice
0329
0330 reg:
0331 items:
0332 - minimum: 0
0333 maximum: 7
0334 description:
0335 Must contain the SDIO function number of the function this
0336 subnode describes. A value of 0 denotes the memory SD
0337 function, values from 1 to 7 denote the SDIO functions.
0338
0339 required:
0340 - reg
0341
0342 "^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)|uhs-(sdr(12|25|50|104)|ddr50))$":
0343 $ref: /schemas/types.yaml#/definitions/uint32-array
0344
0345 minItems: 2
0346 maxItems: 2
0347 items:
0348 minimum: 0
0349 maximum: 359
0350 description:
0351 Set the clock (phase) delays which are to be configured in the
0352 controller while switching to particular speed mode. These values
0353 are in pair of degrees.
0354
0355 dependencies:
0356 cd-debounce-delay-ms: [ cd-gpios ]
0357 fixed-emmc-driver-type: [ non-removable ]
0358
0359 additionalProperties: true
0360
0361 examples:
0362 - |
0363 mmc3: mmc@1c12000 {
0364 #address-cells = <1>;
0365 #size-cells = <0>;
0366 reg = <0x1c12000 0x200>;
0367 pinctrl-names = "default";
0368 pinctrl-0 = <&mmc3_pins_a>;
0369 vmmc-supply = <®_vmmc3>;
0370 bus-width = <4>;
0371 non-removable;
0372 mmc-pwrseq = <&sdhci0_pwrseq>;
0373
0374 brcmf: wifi@1 {
0375 reg = <1>;
0376 compatible = "brcm,bcm4329-fmac";
0377 interrupt-parent = <&pio>;
0378 interrupts = <10 8>;
0379 interrupt-names = "host-wake";
0380 };
0381 };
