0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/mmc/microchip,dw-sparx5-sdhci.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Microchip Sparx5 Mobile Storage Host Controller Binding
0008
0009 allOf:
0010 - $ref: "mmc-controller.yaml"
0011
0012 maintainers:
0013 - Lars Povlsen <lars.povlsen@microchip.com>
0014
0015 # Everything else is described in the common file
0016 properties:
0017 compatible:
0018 const: microchip,dw-sparx5-sdhci
0019
0020 reg:
0021 maxItems: 1
0022
0023 interrupts:
0024 maxItems: 1
0025
0026 clocks:
0027 maxItems: 1
0028 description:
0029 Handle to "core" clock for the sdhci controller.
0030
0031 clock-names:
0032 items:
0033 - const: core
0034
0035 microchip,clock-delay:
0036 description: Delay clock to card to meet setup time requirements.
0037 Each step increase by 1.25ns.
0038 $ref: "/schemas/types.yaml#/definitions/uint32"
0039 minimum: 1
0040 maximum: 15
0041
0042 required:
0043 - compatible
0044 - reg
0045 - interrupts
0046 - clocks
0047 - clock-names
0048
0049 unevaluatedProperties: false
0050
0051 examples:
0052 - |
0053 #include <dt-bindings/interrupt-controller/arm-gic.h>
0054 #include <dt-bindings/clock/microchip,sparx5.h>
0055 sdhci0: mmc@600800000 {
0056 compatible = "microchip,dw-sparx5-sdhci";
0057 reg = <0x00800000 0x1000>;
0058 pinctrl-0 = <&emmc_pins>;
0059 pinctrl-names = "default";
0060 clocks = <&clks CLK_ID_AUX1>;
0061 clock-names = "core";
0062 assigned-clocks = <&clks CLK_ID_AUX1>;
0063 assigned-clock-rates = <800000000>;
0064 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
0065 bus-width = <8>;
0066 microchip,clock-delay = <10>;
0067 };
