0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
0008
0009 maintainers:
0010 - Shawn Guo <shawnguo@kernel.org>
0011
0012 allOf:
0013 - $ref: "mmc-controller.yaml"
0014
0015 description: |
0016 The Enhanced Secure Digital Host Controller on Freescale i.MX family
0017 provides an interface for MMC, SD, and SDIO types of memory cards.
0018
0019 This file documents differences between the core properties described
0020 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
0021
0022 properties:
0023 compatible:
0024 oneOf:
0025 - enum:
0026 - fsl,imx25-esdhc
0027 - fsl,imx35-esdhc
0028 - fsl,imx51-esdhc
0029 - fsl,imx53-esdhc
0030 - fsl,imx6q-usdhc
0031 - fsl,imx6sl-usdhc
0032 - fsl,imx6sll-usdhc
0033 - fsl,imx6sx-usdhc
0034 - fsl,imx6ull-usdhc
0035 - fsl,imx7d-usdhc
0036 - fsl,imx7ulp-usdhc
0037 - fsl,imx8mm-usdhc
0038 - fsl,imxrt1050-usdhc
0039 - nxp,s32g2-usdhc
0040 - items:
0041 - enum:
0042 - fsl,imx8mq-usdhc
0043 - const: fsl,imx7d-usdhc
0044 - items:
0045 - enum:
0046 - fsl,imx8mn-usdhc
0047 - fsl,imx8mp-usdhc
0048 - fsl,imx93-usdhc
0049 - fsl,imx8ulp-usdhc
0050 - const: fsl,imx8mm-usdhc
0051 - items:
0052 - enum:
0053 - fsl,imx8qm-usdhc
0054 - const: fsl,imx8qxp-usdhc
0055 - items:
0056 - enum:
0057 - fsl,imx8dxl-usdhc
0058 - fsl,imx8mm-usdhc
0059 - fsl,imx8mn-usdhc
0060 - fsl,imx8mp-usdhc
0061 - fsl,imx8qm-usdhc
0062 - fsl,imx8qxp-usdhc
0063 - const: fsl,imx7d-usdhc
0064 deprecated: true
0065 - items:
0066 - enum:
0067 - fsl,imx8mn-usdhc
0068 - fsl,imx8mp-usdhc
0069 - const: fsl,imx8mm-usdhc
0070 - const: fsl,imx7d-usdhc
0071 deprecated: true
0072 - items:
0073 - enum:
0074 - fsl,imx8qm-usdhc
0075 - const: fsl,imx8qxp-usdhc
0076 - const: fsl,imx7d-usdhc
0077 deprecated: true
0078
0079 reg:
0080 maxItems: 1
0081
0082 interrupts:
0083 maxItems: 1
0084
0085 fsl,wp-controller:
0086 description: |
0087 boolean, if present, indicate to use controller internal write protection.
0088 type: boolean
0089
0090 fsl,delay-line:
0091 $ref: /schemas/types.yaml#/definitions/uint32
0092 description: |
0093 Specify the number of delay cells for override mode.
0094 This is used to set the clock delay for DLL(Delay Line) on override mode
0095 to select a proper data sampling window in case the clock quality is not good
0096 due to signal path is too long on the board. Please refer to eSDHC/uSDHC
0097 chapter, DLL (Delay Line) section in RM for details.
0098 default: 0
0099
0100 voltage-ranges:
0101 $ref: '/schemas/types.yaml#/definitions/uint32-matrix'
0102 description: |
0103 Specify the voltage range in case there are software transparent level
0104 shifters on the outputs of the controller. Two cells are required, first
0105 cell specifies minimum slot voltage (mV), second cell specifies maximum
0106 slot voltage (mV).
0107 items:
0108 items:
0109 - description: value for minimum slot voltage
0110 - description: value for maximum slot voltage
0111 maxItems: 1
0112
0113 fsl,tuning-start-tap:
0114 $ref: /schemas/types.yaml#/definitions/uint32
0115 description: |
0116 Specify the start delay cell point when send first CMD19 in tuning procedure.
0117 default: 0
0118
0119 fsl,tuning-step:
0120 $ref: /schemas/types.yaml#/definitions/uint32
0121 description: |
0122 Specify the increasing delay cell steps in tuning procedure.
0123 The uSDHC use one delay cell as default increasing step to do tuning process.
0124 This property allows user to change the tuning step to more than one delay
0125 cells which is useful for some special boards or cards when the default
0126 tuning step can't find the proper delay window within limited tuning retries.
0127 default: 0
0128
0129 fsl,strobe-dll-delay-target:
0130 $ref: /schemas/types.yaml#/definitions/uint32
0131 description: |
0132 Specify the strobe dll control slave delay target.
0133 This delay target programming host controller loopback read clock, and this
0134 property allows user to change the delay target for the strobe input read clock.
0135 If not use this property, driver default set the delay target to value 7.
0136 Only eMMC HS400 mode need to take care of this property.
0137 default: 0
0138
0139 clocks:
0140 maxItems: 3
0141 description:
0142 Handle clocks for the sdhc controller.
0143
0144 clock-names:
0145 items:
0146 - const: ipg
0147 - const: ahb
0148 - const: per
0149
0150 power-domains:
0151 maxItems: 1
0152
0153 pinctrl-names:
0154 oneOf:
0155 - minItems: 3
0156 items:
0157 - const: default
0158 - const: state_100mhz
0159 - const: state_200mhz
0160 - const: sleep
0161 - minItems: 1
0162 items:
0163 - const: default
0164 - const: sleep
0165
0166 required:
0167 - compatible
0168 - reg
0169 - interrupts
0170
0171 unevaluatedProperties: false
0172
0173 examples:
0174 - |
0175 mmc@70004000 {
0176 compatible = "fsl,imx51-esdhc";
0177 reg = <0x70004000 0x4000>;
0178 interrupts = <1>;
0179 fsl,wp-controller;
0180 };
0181
0182 mmc@70008000 {
0183 compatible = "fsl,imx51-esdhc";
0184 reg = <0x70008000 0x4000>;
0185 interrupts = <2>;
0186 cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
0187 wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */
0188 };
