0001 # SPDX-License-Identifier: GPL-2.0-or-later
0002 # Copyright 2019 IBM Corp.
0003 %YAML 1.2
0004 ---
0005 $id: http://devicetree.org/schemas/mmc/aspeed,sdhci.yaml#
0006 $schema: http://devicetree.org/meta-schemas/core.yaml#
0007
0008 title: ASPEED SD/SDIO/MMC Controller
0009
0010 maintainers:
0011 - Andrew Jeffery <andrew@aj.id.au>
0012 - Ryan Chen <ryanchen.aspeed@gmail.com>
0013
0014 description: |+
0015 The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO
0016 Host Specification v2.00, with 1 or 4 bit data buses, or an 8 bit data bus if
0017 only a single slot is enabled.
0018
0019 The two slots are supported by a common configuration area. As the SDHCIs for
0020 the slots are dependent on the common configuration area, they are described
0021 as child nodes.
0022
0023 properties:
0024 compatible:
0025 enum:
0026 - aspeed,ast2400-sd-controller
0027 - aspeed,ast2500-sd-controller
0028 - aspeed,ast2600-sd-controller
0029 reg:
0030 maxItems: 1
0031 description: Common configuration registers
0032 "#address-cells":
0033 const: 1
0034 "#size-cells":
0035 const: 1
0036 ranges: true
0037 clocks:
0038 maxItems: 1
0039 description: The SD/SDIO controller clock gate
0040
0041 patternProperties:
0042 "^sdhci@[0-9a-f]+$":
0043 type: object
0044 $ref: mmc-controller.yaml
0045
0046 properties:
0047 compatible:
0048 enum:
0049 - aspeed,ast2400-sdhci
0050 - aspeed,ast2500-sdhci
0051 - aspeed,ast2600-sdhci
0052 reg:
0053 maxItems: 1
0054 description: The SDHCI registers
0055 clocks:
0056 maxItems: 1
0057 description: The SD bus clock
0058 interrupts:
0059 maxItems: 1
0060 description: The SD interrupt shared between both slots
0061 sdhci,auto-cmd12:
0062 type: boolean
0063 description: Specifies that controller should use auto CMD12
0064 required:
0065 - compatible
0066 - reg
0067 - clocks
0068 - interrupts
0069
0070 additionalProperties: false
0071
0072 required:
0073 - compatible
0074 - reg
0075 - "#address-cells"
0076 - "#size-cells"
0077 - ranges
0078 - clocks
0079
0080 examples:
0081 - |
0082 #include <dt-bindings/clock/aspeed-clock.h>
0083 sdc@1e740000 {
0084 compatible = "aspeed,ast2500-sd-controller";
0085 reg = <0x1e740000 0x100>;
0086 #address-cells = <1>;
0087 #size-cells = <1>;
0088 ranges = <0 0x1e740000 0x20000>;
0089 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
0090
0091 sdhci0: sdhci@100 {
0092 compatible = "aspeed,ast2500-sdhci";
0093 reg = <0x100 0x100>;
0094 interrupts = <26>;
0095 sdhci,auto-cmd12;
0096 clocks = <&syscon ASPEED_CLK_SDIO>;
0097 };
0098
0099 sdhci1: sdhci@200 {
0100 compatible = "aspeed,ast2500-sdhci";
0101 reg = <0x200 0x100>;
0102 interrupts = <26>;
0103 sdhci,auto-cmd12;
0104 clocks = <&syscon ASPEED_CLK_SDIO>;
0105 };
0106 };
