0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/mmc/amlogic,meson-mx-sdhc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Amlogic Meson SDHC controller Device Tree Bindings
0008
0009 allOf:
0010 - $ref: "mmc-controller.yaml"
0011
0012 maintainers:
0013 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
0014
0015 description: |
0016 The SDHC MMC host controller on Amlogic SoCs provides an eMMC and MMC
0017 card interface with 1/4/8-bit bus width.
0018 It supports eMMC spec 4.4x/4.5x including HS200 (up to 100MHz clock).
0019
0020 properties:
0021 compatible:
0022 items:
0023 - enum:
0024 - amlogic,meson8-sdhc
0025 - amlogic,meson8b-sdhc
0026 - amlogic,meson8m2-sdhc
0027 - const: amlogic,meson-mx-sdhc
0028
0029 reg:
0030 minItems: 1
0031
0032 interrupts:
0033 minItems: 1
0034
0035 clocks:
0036 minItems: 5
0037
0038 clock-names:
0039 items:
0040 - const: clkin0
0041 - const: clkin1
0042 - const: clkin2
0043 - const: clkin3
0044 - const: pclk
0045
0046 required:
0047 - compatible
0048 - reg
0049 - interrupts
0050 - clocks
0051 - clock-names
0052
0053 unevaluatedProperties: false
0054
0055 examples:
0056 - |
0057 #include <dt-bindings/interrupt-controller/irq.h>
0058 #include <dt-bindings/interrupt-controller/arm-gic.h>
0059
0060 sdhc: mmc@8e00 {
0061 compatible = "amlogic,meson8-sdhc", "amlogic,meson-mx-sdhc";
0062 reg = <0x8e00 0x42>;
0063 interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>;
0064 clocks = <&xtal>,
0065 <&fclk_div4>,
0066 <&fclk_div3>,
0067 <&fclk_div5>,
0068 <&sdhc_pclk>;
0069 clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk";
0070 };
