0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/misc/nvidia,tegra186-misc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: NVIDIA Tegra186 (and later) MISC register block
0008
0009 maintainers:
0010 - Thierry Reding <thierry.reding@gmail.com>
0011 - Jon Hunter <jonathanh@nvidia.com>
0012
0013 description: The MISC register block found on Tegra186 and later SoCs contains
0014 registers that can be used to identify a given chip and various strapping
0015 options.
0016
0017 properties:
0018 compatible:
0019 enum:
0020 - nvidia,tegra186-misc
0021 - nvidia,tegra194-misc
0022 - nvidia,tegra234-misc
0023
0024 reg:
0025 items:
0026 - description: physical address and length of the registers which
0027 contain revision and debug features
0028 - description: physical address and length of the registers which
0029 indicate strapping options
0030
0031 additionalProperties: false
0032
0033 required:
0034 - compatible
0035 - reg
0036
0037 examples:
0038 - |
0039 misc@100000 {
0040 compatible = "nvidia,tegra186-misc";
0041 reg = <0x00100000 0xf000>,
0042 <0x0010f000 0x1000>;
0043 };
