0001 * ASPEED AST2400 and AST2500 coprocessor interrupt controller
0002
0003 This file describes the bindings for the interrupt controller present
0004 in the AST2400 and AST2500 BMC SoCs which provides interrupt to the
0005 ColdFire coprocessor.
0006
0007 It is not a normal interrupt controller and it would be rather
0008 inconvenient to create an interrupt tree for it as it somewhat shares
0009 some of the same sources as the main ARM interrupt controller but with
0010 different numbers.
0011
0012 The AST2500 supports a SW generated interrupt
0013
0014 Required properties:
0015 - reg: address and length of the register for the device.
0016 - compatible: "aspeed,cvic" and one of:
0017 "aspeed,ast2400-cvic"
0018 or
0019 "aspeed,ast2500-cvic"
0020
0021 - valid-sources: One cell, bitmap of supported sources for the implementation
0022
0023 Optional properties;
0024 - copro-sw-interrupts: List of interrupt numbers that can be used as
0025 SW interrupts from the ARM to the coprocessor.
0026 (AST2500 only)
0027
0028 Example:
0029
0030 cvic: copro-interrupt-controller@1e6c2000 {
0031 compatible = "aspeed,ast2500-cvic";
0032 valid-sources = <0xffffffff>;
0033 copro-sw-interrupts = <1>;
0034 reg = <0x1e6c2000 0x80>;
0035 };
