0001 * UCTL USB controller glue
0002
0003 Properties:
0004 - compatible: "cavium,octeon-6335-uctl"
0005
0006 Compatibility with all cn6XXX SOCs.
0007
0008 - reg: The base address of the UCTL register bank.
0009
0010 - #address-cells: Must be <2>.
0011
0012 - #size-cells: Must be <2>.
0013
0014 - ranges: Empty to signify direct mapping of the children.
0015
0016 - refclk-frequency: A single cell containing the reference clock
0017 frequency in Hz.
0018
0019 - refclk-type: A string describing the reference clock connection
0020 either "crystal" or "external".
0021
0022 Example:
0023 uctl@118006f000000 {
0024 compatible = "cavium,octeon-6335-uctl";
0025 reg = <0x11800 0x6f000000 0x0 0x100>;
0026 ranges; /* Direct mapping */
0027 #address-cells = <2>;
0028 #size-cells = <2>;
0029 /* 12MHz, 24MHz and 48MHz allowed */
0030 refclk-frequency = <24000000>;
0031 /* Either "crystal" or "external" */
0032 refclk-type = "crystal";
0033
0034 ehci@16f0000000000 {
0035 compatible = "cavium,octeon-6335-ehci","usb-ehci";
0036 reg = <0x16f00 0x00000000 0x0 0x100>;
0037 interrupts = <0 56>;
0038 big-endian-regs;
0039 };
0040 ohci@16f0000000400 {
0041 compatible = "cavium,octeon-6335-ohci","usb-ohci";
0042 reg = <0x16f00 0x00000400 0x0 0x100>;
0043 interrupts = <0 56>;
0044 big-endian-regs;
0045 };
0046 };
