mips/cavium/dma-engine.txt

0001 * DMA Engine.
0002
0003 The Octeon DMA Engine transfers between the Boot Bus and main memory.
0004 The DMA Engine will be referred to by phandle by any device that is
0005 connected to it.
0006
0007 Properties:
0008 - compatible: "cavium,octeon-5750-bootbus-dma"
0009
0010   Compatibility with all cn52XX, cn56XX and cn6XXX SOCs.
0011
0012 - reg: The base address of the DMA Engine's register bank.
0013
0014 - interrupts: A single interrupt specifier.
0015
0016 Example:
0017         dma0: dma-engine@1180000000100 {
0018                 compatible = "cavium,octeon-5750-bootbus-dma";
0019                 reg = <0x11800 0x00000100 0x0 0x8>;
0020                 interrupts = <0 63>;
0021         };